Lexicon MC-1, Руководство по обслуживанию

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Lexicon
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ROM. If it can return the correct version, power, serial communications, and clocks etc. are getting to the
AC3 board and the 38500 is booting and talking to the Z80.
AC3 MEM Test
The AC3 MEM test sends test patterns to the 3 memory IC's on the AC3 board. The test patterns are
similar to the test patterns that other memory sections of the unit are tested with. Data written to and read
from memory with 55555h, AAAAAh, FFFFFh, and 00000h.
DTS AC3SPI Test
The DTS AC3SPI Test requires that before powering on the MC-1 a DTS board be installed. This test
sends 81h to the Zoran DSP 38500 on the DTS board. This instructs the 38500 to return the version
encoded in its ROM. If it can return the correct version, power, serial communications, and clocks etc. are
getting to the DTS board and the 38500 is booting and talking to the Z80.
DTS AC3MEM Test
The DTS AC3MEM test sends test patterns to the 3 memory IC's on the DTS board. The test patterns are
similar to the test patterns that other memory sections of the unit are tested with. Data written to and read
from memory with 55555h, AAAAAh, FFFFFh, and 00000h.
DTS 56K Test
The DTS 56K Test is a SPI, (serial peripheral test) which sends a serial stream of data to the 56004 on the
DTS board. In this test, the 56004 is verified to be able to boot and to pass data. The test does not fully
verify the audio processing function of the 56004. However, if the 56004 can pass this test, which also
exercises the CPU of the 56004, most of the internal workings of the chip are operational. First the 56004 is
reset and after it comes out of reset the test program is loaded. The 56004 has internal ROM so if it comes
out of reset, it has booted and completed its internal boot program. This indicates that a fair amount of its
internal circuitry is working. Then test data patterns are sent via SER_CTRL_DATA, pin 15 of the
connector, and read back via SER_RETURN_DATA on pin 21. If the data returned matches what was sent,
the test passes.
Contrast Test
The Contrast Test verifies that the range of contrast control for the VFD is functioning. The VOLUME knob
is turned clockwise and counter clockwise, and the contrast on the VFD is stepped through its range. Also
tested is the logo illumination. The logo board is illuminated throughout the contrast of the VFD except at
one step. This is the fully counter clockwise position.
Burn-In Loop
This test is executed during the burn-in cycle to exercise the digital circuitry. The Burn-In Loop Test
continuously runs the Pre Burn-In Test with one exception. The data left in the non-volatile section of the
SRAM during the Pre Burn-In Test is checked by the Burn-In Loop Test to verify the data remains intact. If a
failure occurs, the diagnostic attempts to go into a loop on the test that failed, the VFD attempts to display
the error, and an entry is made into the error log.
SRAM Initialize
This test initializes the entire SRAM. Upon completion of the test the MC-1 initiates Power On Diagnostics
and returns to normal operation. All settings are then restored to their factory default values.
Debugging Tests
The following tests are designed to help isolate sections of the MC-1 circuitry to aid in fixing a failed unit
.