TABLE OF CONTENTS
WARNINGS............................................................................................................................1
1 TECHNICAL DESCRIPTION............................................................................................3
2 FUNCTIONING DESCRIPTION.......................................................................................3
2.1 CONNECTION...........................................................................................................5
2.1.1 ANALOGIC CONNECTION................................................................................6
2.1.1.1 UNBALANCED SOURCE INPUT...................................................................6
2.1.1.2 BALANCED SOURCE INPUT.........................................................................7
2.1.1.3 BALANCED OUTPUT TO DESTINATION......................................................7
2.1.1.4 UNBALANCED OUTPUT TO DESTINATION.................................................8
3 FIRMWARE UPDATE.......................................................................................................8
3. 1 UNIT ACCESS............................................................................................................8
3.2 FIRMWARE LOADING................................................................................................9
4 TECHNICAL SPECIFICATIONS.....................................................................................10
Figure Index
Figure 1: Internal Diagram (Default)......................................................................................3
Figure 2: Possible configurations...........................................................................................4
Figure 3: Rear connections....................................................................................................5
Figure 4: Unbalanced source input 2 wires...........................................................................7
Figure 5: Unbalanced source input 3 wires...........................................................................7
Figure 6: Balanced source input............................................................................................7
Figure 7: Balanced output to destination...............................................................................7
Figure 8: Unbalanced output to destination...........................................................................8
Figure 9: Unit access.............................................................................................................8
Figure 10: Firmware loading..................................................................................................9
Table Index
Table 1: Connections Description..........................................................................................6
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