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13
LatticeECP2 Standard Evaluation Board
Lattice Semiconductor
User’s Guide
56
GND
-
-
57
PCI_AD2
W13
4
58
PCI_AD0
U14
4
59
+3.3V
-
-
60
PCI_REQ64_N
W14
4
61
NC
-
-
62
NC
-
-
63
GND
-
-
64
PCI_CBE7_N
V14
4
65
PCI_CBE5_N
U15
4
66
+3.3V
-
-
67
PAR64
T15
4
68
PCI_AD62
Y15
4
69
GND
-
-
70
PCI_AD60
W15
4
71
PCI_AD58
U16
4
72
GND
-
-
73
PCI_AD56
V16
4
74
PCI_AD54
T16
4
75
+3.3V
-
-
76
PCI_AD52
Y16
4
77
PCI_AD50
W16
4
78
GND
-
-
79
PCI_AD48
Y17
4
80
PCI_AD46
W17
4
81
GND
-
-
82
PCI_AD44
Y18
4
83
PCI_AD42
W18
4
84
+3.3V
-
-
85
PCI_AD40
Y19
4
86
PCI_AD38
Y20
4
87
GND
-
-
88
PCI_AD36
V17
4
89
PCI_AD34
V18
4
90
GND
-
-
91
PCI_AD32
U18
4
92
NC
-
-
93
GND
-
-
94
NC
-
-
Note: PD = pull-down resistor, PU = pull-up resistor, NC = no-connect, TP = test point.
Table 27. PCI Connections - Solder Side (Continued)
J48
Signal Name
LatticeECP2 Pin
sysIO Bank
Note