MachXO2 Breakout Board Evaluation Kit
Evaluation Board User Guide
© 2014-202
2
Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02051-2.3
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Table 7.4. Expansion Header Pin Information (J3)
Header Pin Number
-1200ZE Function
-7000HE Function
MachXO2 Pin
1
VCC_1.2V
VCC_1.2V
36, 72, 108, 144
2
VCCIO1
VCCIO1
79, 88, 102
3
VCC_1.2V
VCC_1.2V
36, 72, 108, 144
4
NC
NC
—
5
PR10C
PR24A
74
6
PR10D
PR24B
73
7
PR10A
PR23A
76
8
PR10B
PR23B
75
9
GND
GND
—
10
GND
GND
—
11
PR9C
PR21A
78
12
PR9D
PR21B
77
13
PR9A
PR18A
82
14
PR9B
PR18B
81
15
GND
GND
—
16
GND
GND
—
17
PR8C
PR17A
84
18
PR8D
PR17B
83
19
PR8A
PR16A
86
20
PR8B
PR16B
85
21
GND
GND
—
22
GND
GND
—
23
PR5C / PCLKT1_0
PR12A / PCLKT1_0
92
24
PR5D / PCLKC1_0
PR12B / PCLKC1_0
91
25
PR5A
PR11A
94
26
PR5B
PR11B
93
27
GND
GND
—
28
GND
GND
—
29
PR4C
PR9A
96
30
PR4D
PR9B
95
31
PR4A
PR7A
98
32
PR4B
PR7B
97
33
GND
GND
—
34
GND
GND
—
35
PR3A
PR5A
100
36
PR3B
PR5B
99
37
PR2C
PR3A
105
38
PR2D
PR3B
104
39
PR2A
PR2A
107
40
PR2B
PR2B
106