Lattice Semiconductor iCE40 UltraLite, Руководство по эксплуатации

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iCE40 Oscillator Usage Guide
Technical Note
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FPGA-TN-02008-1.7 9
Appendix A: Design Entry
The following examples illustrate oscillator primitive usage in Verilog.
A.1. SB_LFOSC Usage in iCEcube2 Software
Synthesis Attributes
/* synthesis ROUTE_THROUGH_FABRIC = <value> */
Value:
0: Use dedicated clock network. Default option.
1: Use fabric routes.
Verilog Instantiation
SB_LFOSC OSCInst1 (
.CLKLFEN(ENCLKLF),
.CLKLFPU(CLKLF_POWERUP),
.CLKLF(CLKLF)
) /* synthesis ROUTE_THROUGH_FABRIC= 1 */; //the value can be either 0 or 1
A.2. SB_HFOSC Usage in iCEcube2 Software
Synthesis Attributes
/* synthesis ROUTE_THROUGH_FABRIC = <value> */
Value:
0: Use dedicated clock network. Default option.
1: Use fabric routes.
Parameter Values
The SB_HFOSC primitive has the following parameter options:
Parameter CLKHF_DIV = "0b00" (default), "0b01", "0b10", "0b11" (Clock divider selection. 0b00 = 4 8 MHz, 0b01 = 24 MHz,
0b10 = 12 MHz, 0b11 = 6 MHz)
Verilog Instantiation
SB_HFOSC OSCInst0 (
.CLKHFEN(ENCLKHF),
.CLKHFPU(CLKHF_POWERUP),
.CLKHF(CLKHF)
) /* synthesis ROUTE_THROUGH_FABRIC= 1 */; //the value can be either 0 or 1
defparam OSCInst0.CLKHF_DIV = "0b00";
A.3. LSOSC Usage in Lattice Radiant Software
Verilog Instantiation
LSOSC OSCInst1 (
.CLKLFEN(ENCLKLF),
.CLKLFPU(CLKLF_POWERUP),
.CLKLF(CLKLF)
);