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CrossLink-NX Object Counting Using VGG Quick Start Guide 

 

Application Note 

 

© 2020 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at 

www.latticesemi.com/legal

 

All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 

FPGA-AN-02024-1.0 

 

Contents 

Acronyms in This Document ................................................................................................................................................. 4

 

1.

 

Introduction .................................................................................................................................................................. 5

 

1.1.

 

Design Process Overview .................................................................................................................................... 5

 

2.

 

Machine Training and Creating Frozen File .................................................................................................................. 7

 

2.1.

 

Verifying TensorFlow and Tool Environment ...................................................................................................... 7

 

2.2.

 

Preparing the Dataset ......................................................................................................................................... 7

 

2.3.

 

Training the Machine .......................................................................................................................................... 8

 

2.4.

 

Generating Frozen (*.pb) File ............................................................................................................................ 11

 

3.

 

Generating the Binary File .......................................................................................................................................... 12

 

4.

 

Programming the Bitstream and Binary files to VIP Board and SD Card .................................................................... 12

 

Technical Support Assistance ............................................................................................................................................. 13

 

Revision History .................................................................................................................................................................. 14

 

 

Figures 

Figure 1.1. Lattice EVDK with MicroSD Card Adapter Board ................................................................................................ 5

 

Figure 1.2. Lattice Machine Learning Design Flow ............................................................................................................... 6

 

Figure 2.1. TensorFlow Installation Check ............................................................................................................................ 7

 

Figure 2.2. Dataset Image Size Check ................................................................................................................................... 7

 

Figure 2.3. Dataset Folder Path Check .................................................................................................................................. 8

 

Figure 2.4. Dataset List, Image, and Label Data Path ........................................................................................................... 8

 

Figure 2.5. Create a Label File ............................................................................................................................................... 8

 

Figure 2.6. Execute the Script ............................................................................................................................................... 9

 

Figure 2.7. TensorBoard – Generated Link ........................................................................................................................... 9

 

Figure 2.8. Training Status .................................................................................................................................................... 9

 

Figure 2.9. Image Menu ...................................................................................................................................................... 10

 

Figure 2.10. Checkpoint Data Files at Log Folder ................................................................................................................ 10

 

Figure 2.11. Create *.pbtxt File .......................................................................................................................................... 11

 

Figure 2.12. Check Frozen File ............................................................................................................................................ 11

 

 

Содержание CrossLink-NX

Страница 1: ...CrossLink NX Object Counting Using VGG Quick Start Guide Application Note FPGA AN 02024 1 0 May 2020...

Страница 2: ...AS IS and with all faults and all risk associated with such information is entirely with Buyer Buyer shall not rely on any data and performance specifications or parameters provided herein Products so...

Страница 3: ...eparing the Dataset 7 2 3 Training the Machine 8 2 4 Generating Frozen pb File 11 3 Generating the Binary File 12 4 Programming the Bitstream and Binary files to VIP Board and SD Card 12 Technical Sup...

Страница 4: ...sted at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change w...

Страница 5: ...that you are familiar with the basic Lattice FPGA design flow and mainly focuses on the Machine Learning part of the overall development process For detailed instructions of the design flow described...

Страница 6: ...stered trademarks patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specificat...

Страница 7: ...fying TensorFlow and Tool Environment Check if TensorFlow and your tool environment are installed correctly For the detailed procedure in creating the basic environment on PC refer to the Setting up t...

Страница 8: ...training refer to the Training the Machine section in CrossLink NX Object Counting Using VGG CNN Accelerator IP FPGA RD 02200 To train the machine 1 Check the training dataset path in the training sc...

Страница 9: ...emarks of their respective holders The specifications and information herein are subject to change without notice FPGA AN 02024 1 0 9 3 Run machine training In the command prompt execute run command F...

Страница 10: ...are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 10 FPGA AN 02024 1 0 Figure 2 9 shows the image menu...

Страница 11: ...re trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA AN 02024 1 0 11 2 4 Generating Frozen pb File To...

Страница 12: ...on herein are subject to change without notice 12 FPGA AN 02024 1 0 3 Generating the Binary File For the detailed procedure in creating the binary file refer to the Creating Binary File with sensAI se...

Страница 13: ...nd disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein...

Страница 14: ...patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and informat...

Страница 15: ...www latticesemi com...

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