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HDK8450 (SM8450P) Processor User Guide
Main board
80-28453-2 Rev. C Confidential
– Qualcomm Technologies, Inc. and/or its affiliated companies – May Contain Trade Secrets
13
MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION
Subsystem /
Connectors
Feature Set
Description
Specification
PM8350B
The PM8350B/PM8350BH/PM8350BHS interface PMIC,
supplements the master core PM8350 PMIC and the
slave core PM8350C PMIC to integrate all wireless
handset power management, general housekeeping, and
user interface support functions into an integrated three-
IC solution.
▪
Best in class high-efficiency 6A 3-level buck/Div2
charge pump combination architecture Li-ion battery
charger (> 97% peak efficiency)
▪
Dedicated paths for USB and wireless charging with
charger operation up to 21.5 V (25 V absolute max)
▪
Supports up to a 6A charge current (single path) and a
12 A charge current (dual path using
SMB1396/SMB1398 companion ICs)
▪
Supports USB Type-C Specification Rev. 1.4 and USB
Power Delivery Specification Rev. 3.0
▪
Supports Qualcomm® Quick Charge™ 2.0, Quick
Charge 3.0, and Quick Charge 4.0 technology
▪
Supports 2S battery with charge balancing (SMB1399
needed). See Section 1.3 for details.
▪
Simultaneous wireless charging and OTG support
using external 5 V boost
▪
Simultaneous USB charging and reverse wireless
charging support using external 5 V boost
▪
Qualcomm battery gauge with improved SoC accuracy
▪
Analog-to-digital converter (ADC) subsystem with
analog multiplexer (AMUX) and voltage/current analog-
to-digital converter (VADC/IADC)
▪
Battery interface module (BIM) that includes battery
serial interface (BSI) or PMIC serial interface (PSI) and
battery missing detection (BMD)
▪
Battery current limiting (BCL) subsystem that provides
both hardware and software alarms, which are used by
the system for reducing battery current.
▪
Triple supply high performance and high efficiency
boost regulators for OLED panels
▪
Full H-bridge haptics driver with dedicated 5 V to 10 V
programmable boost for LRA application and
SoundWire interface. See Section 1.3 for details.
▪
SPMI interface
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Eight GPIOs
▪
165-pin fan-out wafer-level nanoscale package (165
FOWNSP)
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