Lanner electronics MB-X63 Series, Руководство пользователя, Страница: 32 / 47

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3.5 A
DVANCED
C
HIPSET
F
EATURES
When you select the “CHIPSET FEATURES SETUP” on the main program, the screen display will
appears as:
Advanced Chipset Features Setup Screen
CMOS Setup Utility – Copyright © 1984-2001 Award Software
Advanced Chipset Features
Item Help
Menu Level X
X
X
X
X
X
DRAM Timing By SPD
DRAM Clock
SDRAM Cycle Length
Bank Interleave
Memory Hole
P2C/C2P Concurrency
System BIOS Cacheable
AGP Aperture Size
AGP Driving Control
AGP Driving Value
AGP Fast Write
OnChip USB
USB Keyboard Support
USB Mouse Support
OnChip Sound
CPU to PCI Write Buffer
PCI Dynamic Bursting
PCI Master 0 WS Write
PCI Delay Transaction
PCI#2 Access #1 Retry
AGP Master 1 WS Writer
AGP Master 1 WS Read
Memory Parity / ECC Check Enabled
Host CLK
3
Disabled
Disabled
Enabled
Disabled
64M
Auto
DA
Disabled
Disabled
Disabled
Disabled
Auto
Enabled
Enabled
Enabled
Enabled
Enabled
Disabled
Disabled
Enabled
Enabled adds a parity
check to the boot-up
memory tests. Select
Enabled only if the
system DRAM contains
parity.
á â àß
Move Enter: Select +/-/PU/PD: Value F10: Save Esc: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
DRAM Timing By SPD: Select the DRAM timing by SPD. The default setting is “Enable”.
DRAM Clock : The chipset support synchronous and asynchronous mode between the host clock
and DIMM clock.
Host CLK (default)
DIMM clock equal to host clock
66MHz DIMM clock equal to 66MHz
SDRAM Cycle Length : This item allows you to select the SDRAM cycle length. The settings are 2
or 3.
Bank Interleave: Select the bank interleave. The default setting is “Disable”.
Memory Hole :
In order to improve performance, certain space in memory can be reserved for ISA
cards. This memory must be mapped into the memory space below 16MB.
Enabled
Memory hole supported
Disabled (default) Memory hole not supported
P2C / C2P Concurrency : This item allows you to Enable or Disable the PCI to CPU, CPU to PCI
concurrency. The default setting is “Enabled”.
System BIOS Cacheable : Selecting “Enabled” allows caching of the system BIOS ROM at F0000h –