Enhanced Class 1 Bluetooth v2.1 Module
Hardware Integration Guide
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www.lairdtech.com/bluetooth
15
CONN-HIG-BT740
BT740 carrier board was used for BT740-SA development and antenna performance evaluation. To obtain
similar performance, follow the guidelines in
PCB Layout on Host PCB for BT740-SA
to allow the on-board
antenna to radiate and reduce proximity effects due to nearby host PCB GND copper or metal covers.
BT740-SA on-board antenna datasheet can be accessed from the following link:
http://www.acxc.com.tw/product/at3216/AT3216-B2R7HAA_071204.pdf
6
H
ARDWARE
I
NTEGRATION
S
UGGESTIONS
6.1
Circuit
The BT740 series module is easy to integrate requiring no external components on the customer’s board
apart from those required by customer for development and in customers end application.
Checklist (for the schematic):
VCC_IN – External power source within the operating range specification of BT740-Sx. Add
decoupling (or bulk) capacitors for filtering (or reservoir) the external source. Power-on reset circuitry
within BT740-Sx series module incorporates brown-out detector, thus simplifying power supply design.
Upon application of power, the internal power-on reset ensures module starts correctly.
AIN (ADC) and GPIO (or UART) pin IO voltage levels – BT73-Sx GPIO voltage levels are at 3.3V (see
). Electrical Specifications. Ensure input voltage levels into GPIO pins are at 3.3V voltage levels.
Ensure ADC pin maximum input voltage (1.8 V) for damage is not violated.
UART – Required. Add connector to allow UART to be interfaced to PC (via UART –RS232 or UART-
USB).
UART_RX and UART_CTS – Add a 10 k pull-up to the host PCB on the UART_RX, otherwise the
module remains in deep sleep if not driven to high. The pull-up prevents the module from going into
deep sleep when UART_RX line is idling.
Add a 10 k pull-down to the host PCB on the UART_CTS that, if it is not connected (which we do not
recommend) then the default state for UART_CTS input will be asserted which means can send data
out of UART_TX line.
nRESET pin (active low) – Hardware reset. Wire out to push button or drive by host. If used, the
external reset must be exerted for a minimum of 5 mS. By default, the module is out of reset when
power is applied to the VCC_IN pin.
6.2
PCB Layout on Host PCB - General
Checklist (for PCB):
MUST locate the BT740-SA module close to the edge of PCB (mandatory for BT740-SA for on-board
chips antenna to radiate properly).
Use solid GND plane on inner layer (for best EMC and RF performance).
Place GND vias as close to module GND pads as possible.
Unused host PCB area on surface layer can be flooded with copper but place GND vias regularly to
connect copper flood to inner GND plane. If GND flood copper underside the module then connect
with GND vias to inner GND plane.
Route traces to avoid noise being picked up on VCC_IN supply, Analogue and GPIO (digital) traces.
