COMPONENT MAINTENANCE MANUAL
AVIATION PRODUCTS
Model FA5000
Rev. 02 Page 147
July 21/17
Testing & Fault Isolation
23–70
−
30
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Table 104 Main Processor Troubleshooting Chart (Continued)
Item
ID
Function Type
Failure
Mode
Local Effect
Next Effect
End Effect
UART0 TxD
The UART0
TxD RIPS is
shorted
There is no
communication
between the
UART0 and
the internal
RIPS
The MP PWA
has no RIPS
capability
Communication is disrupted
with the RIPS
G0256
−
UART
0 RIPS
UART0 rxD
The UART0
RxD RIPS is
open
There is no
communication
between the
UART0 and
the internal
RIPS
The MP PWA
has no RIPS
capability
Communication is disrupted
with the RIPS
UART0 rxD
The UART0
RxD RIPS is
shorted
There is no
communication
between the
UART0 and
the internal
RIPS
The MP PWA
has no RIPS
capability
Communication is disrupted
with the RIPS
H027
−
Voltag
e Reg-
ulator
Bank
Power Supply Status
The Voltage
Regulator
Bank is open
The Voltage
Regulator
Bank fails
The CVDR is
unable to shut
down properly
The CVDR is unaware
something is wrong
Power Supply Status
The Voltage
Regulator
Bank is shor-
ted
The Voltage
Regulator
Bank fails
The CVDR
shuts down
The CVDR shuts down
J028
−
Ether-
net In-
ter-
faces
Ethernet
The Ethernet
Interface is
open
The ethernet
MAC port fails
to operate in
full
−
duplex
modes
The CVDR is
unable to per-
form normally
but still oper-
ates
The CVDR is unable to perform
normally but still operates
Ethernet
The Ethernet
Interface is
shorted
The ethernet
MAC port fails
to operate in
full
−
duplex
modes
The CVDR is
unable to per-
form normally
but still oper-
ates
The CVDR is unable to perform
normally but still operates
K029
−
FDR
Data In
HI
Differential ARINC757
(+)
Data I/P HI is
open
Loss of ability
to acquire co-
herent FDR
Data Input
(ARINC 757
High)
Unable to re-
cord good
ARINC 757
data input from
the FPGA
Unable to record good ARINC
757 data input from the FPGA
Differential ARINC757
(+)
Data I/P HI is
shorted
Loss of ability
to acquire co-
herent FDR
Data Input
(ARINC 757
High)
Unable to re-
cord good
ARINC 757
data input from
the FPGA
Unable to record good ARINC
757 data input from the FPGA
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