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SMARC-sAL28 User Guide. Rev. 1.0 

 

www.kontron.com 

 

// 54 

 

9/

 

Bootloader Operation 

9.1.

 

Copyrights and Licensing of U-Boot 

U-Boot is free Software. It is copyrighted by Wolfgang Denk and many others who contributed code. U-Boot can be 
redistributed and modified under the terms of version 2 of the GNU General Public (GPL V2) License as published by 
the Free Software Foundation. 

Actual source code of mainline U-Boot and authors of the source can be obtained from the git repository at 

 

git://git.denx.de/u-boot.git 

SMARC-sAL28 bootloader sources are derived work from a dedicated version of mainline U-Boot, e.g v2018.07. As 
bootloader evolves, the root of the derived work might change to a later version. 

 

 

 

The source code of U-Boot will be delivered with the standard software package. 
Additionally the software can be downloaded from Kontron GitHub repository for SMARC-
sAL28: https://github.com/kontron/u-boot-smarc-sAL28.git 

9.2.

 

Bootloader Quickstart 

The SMARC-sAL28 board comes with U-Boot preinstalled on the QSPI flash device. Follow the steps below to gain 
access to the bootloader command line (CLI) on your host PC. 

 

Connect your host machine to the carrier port connected with the edge connector SER_0 port of the 
module. On Kontron SMARC 2.0 carrier this port is named SER_1. 

 

Start a suitable terminal program on your host and attach it to the port connected with the board’s serial 
interface. Configure the serial line using 115200 baud, 8 data bits, 1 stop bit, no parity. 

 

Connect power supply to the carrier and power up. 

 

When boot messages appear, press any key to stop automatic boot sequence. 

After power on, bootloader boot messages will appear as shown below. There is a 2 second boot delay counter that 
will try to boot linux OS automatically after expiration. Pressing any key will stop the boot delay counter and enter 
the bootloader CLI 

. 

U-Boot SPL 2018.09-g3b96286ea1 (Oct 01 2019 - 00:05:46 +0000) 
Initializing DDR....using raw memory timing 
SPI boot 
Trying to boot from SPI 
 
U-Boot 2018.09-g3b96286ea1 (Oct 01 2019 - 00:05:46 +0000), Build: 401 
SoC:  LS1028A Rev1.0 (0x870b0110) 
Clock Configuration: 
       CPU0(A72):1300 MHz  CPU1(A72):1300 MHz 
       Bus:      400  MHz  DDR:      1600 MT/s 
Reset Configuration Word (RCW): 
       00000000: 34004010 00000030 00000000 00000000 
       00000010: 00000000 008f0000 0030c000 00000000 
       00000020: 06200000 00002580 00000000 00019016 
       00000030: 00000000 00000048 00000000 00000000 
       00000040: 00000000 00000000 00000000 00000000 
       00000050: 00000000 00000000 00000000 00000000 
       00000060: 00000103 00000000 100e7026 00000000 
       00000070: bb580000 00020000 
Model: Kontron SMARC-sAL28 Board 
       Hardware Variant: Single PHY (3) 
       RCW: sl28-3-11_q.bin 
DRAM:  Detected UDIMM Fixed DDR on board 
3.9 GiB 

Содержание SMARC-sAL28

Страница 1: ...USER GUIDE 1 SMARC sAL28 Doc Rev 1 0 Doc ID 1064 6120...

Страница 2: ...SMARC sAL28 Rev 1 0 www kontron com 2 This page has been intentionally left blank...

Страница 3: ...for the specified use without further testing or modification Kontron expressly informs the user that this manual only contains a general description of processes and instructions which may not be app...

Страница 4: ...ucts and applications you should provide adequate design and operating safeguards You are solely responsible for compliance with all legal regulatory safety and security related requirements concernin...

Страница 5: ...ntron com support and services services Customer Comments If you have any difficulties using this user guide discover an error or just want to provide some feedback contact Kontron support Detail any...

Страница 6: ...o observe the precautions indicated and or prescribed by the law may endanger your life health and or result in damage to your material Please refer also to the High Voltage Safety Instructions portio...

Страница 7: ...s before performing any work on this product Earth ground connection to vehicle s chassis or a central grounding point shall remain connected The earth ground cable shall be the last cable to be disco...

Страница 8: ...ct then re pack it in the same manner as it was delivered Special care is necessary when handling or unpacking the product See Special Handling and Unpacking Instruction Environmental Protection State...

Страница 9: ...s 24 5 1 Processor Support 24 5 2 System Memory Support 24 5 3 SPI NOR Flash 24 5 4 I2C Buses 25 5 5 SPI Interfaces 25 5 6 eMMC NAND Flash Memory 25 5 7 SD Card Interface 26 5 8 SerDes Interfaces 27 5...

Страница 10: ...e HSP Assembly 52 8 10 3 Operating without Kontron Heatspreader Plate Assembly 53 8 11 TSN Switch 53 9 Bootloader Operation 54 9 1 Copyrights and Licensing of U Boot 54 9 2 Bootloader Quickstart 54 9...

Страница 11: ...ace 31 Table 21 Pinout of SMARC sAL28 Topside Connector 32 Table 22 Pinout of SMARC sAL28 Bottom Side Connector 36 Table 23 JTAG Debug connector 40 Table 24 Boot Options on the carrier board 41 Table...

Страница 12: ...Guide implies a basic knowledge of PC hard and software This manual is focussed on describing the special features and is not intended to be a standard PC textbook New users are recommended to study t...

Страница 13: ...esistant version for rough environmental conditions Furthermore the standard integrates dedicated interfaces for the latest ARM x86 and SoC processors like LVDS 24 bit RGB and HDMI support OEMs profit...

Страница 14: ...3 GHz dual core 2 GB DDR3L ECC 8 GB eMMC SLC Networkconfig 2 2x PCIe audio DP industrial temperature 51011 0408 13 2 3 SMARC sAL28 LS1028 dual 4E 8S NW 3 SMARC with NXP LS1028 1 3 GHz dual core 4 GB...

Страница 15: ...tead of ABCD no TSN On Carrier Network Variant 2 Dual TSN port module SMARC with NXP LS1028 1 3 GHz dual core 2 GB DDR3L ECC 8 GB eMMC SLC DP industrial temperature GBE0 PHY connected to SGMII L0 to t...

Страница 16: ...ng the TSN switch Interfaces 2 4 SMARC sAL28 Feature Set Table 3 SMARC sAL28 Feature Set SMARC Feature specification SMARC Specification Maximum Number Possible SMARC sAL28 Feature support Description...

Страница 17: ...erature range is 0 C to 125 C Onboard Controllers Ethernet Controller 2x 1 GBE PHY Qualcomm AR8031 AL WOL support 1st PHY via SGMII or RGMII BOM option 2nd PHY as BOM option via SGMII Watchdog CPU int...

Страница 18: ...ignal Display Port Optional dual channel LVDS or eDP Features On Request 2x PCIe x2 or 1x PCIe x4 configuration eMMC 5 1 Flash onboard up to 64 GByte pSLC up to 128 GByte MLC Dual Channel LVDS or eDP...

Страница 19: ...ntron com 19 Vibration Sinus from 10 Hz 3000 Hz Amplitude 10 Hz 57 6 Hz 0 15 mm Acceleration 57 6 Hz 3000Hz 2 g Cycles 10 per axis three axes Theoretical MTBF estimated 10 years at 40 C RoHS II Compli...

Страница 20: ...4 FLEXCAN 2 RCW 0x50 EEPROM RTC TAMPER Standard component Connector Option LVDS1 PCIe D SATA PCIe 3 0 10G SXGMII SGMII Lane A PCIe 3 0 QSGMII SGMII Lane B PCIe 3 0 SGMII Lane C SPI NOR boot flash CS...

Страница 21: ...d and Connectors 4 1 1 Connectors Table 6 Connectors of SMARC sAL28 Connector Function Remark SMARC Central Interface Mating connector SMARC 2 0 MXM3 4 2 Mainboard view and I O locations Figure 3 Top...

Страница 22: ...SMARC sAL28 User Guide Rev 1 0 www kontron com 22 Figure 4 Bottom View 3 Product label 3...

Страница 23: ...SMARC sAL28 User Guide Rev 1 0 www kontron com 23 4 3 Mechanical Drawings Figure 5 Dimensions of SMARC sAL28 Figure 6 Thickness from side view Heat spreader mech data is available on customer section...

Страница 24: ...d accessible with chip selects CS1 Default DDR3L Memory sizes are 2 GByte and 4 GByte Table 8 DDR3L memory options DDR3L memory size DDR3L memory configuration 512 MB 5x 1 GBit density 128Mx8 DDR3L pa...

Страница 25: ...o SPI buses are available at the SMARC sAL28 module Table 11 SPI Buses SMARC Connector LS1028A SPI0 SPI3 ESPI XSPI1_A SPI0 in standard option has one chip select SPI0_CS0 Optional the second chip SPI0...

Страница 26: ...gy The eMMC is reconfigured to pseudo SLC pSLC at the standard products Maximum possible eMMC size with pSLC is 64 Mbytes 5 7 SD Card Interface The SDHC1 interface of the LS1028A is connected to the S...

Страница 27: ...1_TX2 SD1_RX2 LANE2 PCIE_B SD1_TX3 SD1_RX3 LANE3 PCIE_C SD1_TX0 SD1_RX0 LANE0 SGMII_L0 GBE0 PCIE_D SD1_TX1 SD1_RX1 LANE1 SGMII_L1 GBE1 There are maximum 2 PCIe controller and following combinations po...

Страница 28: ...SMARC sAL28 User Guide Rev 1 0 www kontron com 28...

Страница 29: ...OTG feature Table 16 USB Interfaces SMARC Connector LS1028A USB HUB USB2517I Comment USB0 USB HUB port 1 No OTG feature USB1 USB HUB port 2 USB2 USB HUB port 3 USB3 USB1 With OTG feature with USB 3 1...

Страница 30: ...PHY is available on each network variant Network variant 1 has the PHY to CPU connection with RGMII and MDIO address 0x4 0b00100 Network variants 2 3 and 4 has the PHY to CPU connection with SGMII La...

Страница 31: ...ment AUDIO_MCK FTM1_CH2 Whole numbered divider frequencies of 400MHz possible Default is 1 25MHz I2S0_CK SAI5_RX_BCLK SAI6_TX_BCLK I2S0_LRCK SAI5_RX_SYNC SAI6_TX_SYNC I2S0_SDIO SAI5_RX_DATA I2S0_SDOUT...

Страница 32: ...S D PHY P18 GND GND GND GND P19 GBE0_MDI3 Bi Dir GBE MDI AR8031 TRX3 P20 GBE0_MDI3 Bi Dir GBE MDI AR8031 TRX3 P21 GBE0_LINK100 Out OD CMOS 3 3V AR8031 LED_LINK10_100 P22 GBE0_LINK1000 Out OD CMOS 3 3V...

Страница 33: ...CMOS 1 8V LS1028A XSPI1_A_DATA0 P58 ESPI_IO_1 Out CMOS 1 8V LS1028A XSPI1_A_DATA1 P59 GND GND GND GND P60 USB0 Bi Dir USB USB hub USB_DN_D1 P61 USB0 Bi Dir USB USB hub USB_DN_D1 P62 USB0_EN_OC Bi Dir...

Страница 34: ...HDMI_D0 DP1_LANE2 Out TMDS P99 HDMI_D0 DP1_LANE2 Out TMDS P100 GND GND GND GND P101 HDMI_CK DP1_LANE3 Out TMDS P102 HDMI_CK DP1_LANE3 Out TMDS P103 GND GND GND GND P104 HDMI_HPD DP1_HPD In CMOS 1 8V P...

Страница 35: ...0_RTS Out CMOS 1 8V LS1028A LPUART2_CTS_B P132 SER0_CTS In CMOS 1 8V LS1028A LPUART2_RTS_B P133 GND GND GND GND P134 SER1_TX Out CMOS 1 8V LS1028A UART1_SOUT P135 SER1_RX In CMOS 1 8V LS1028A UART1_SI...

Страница 36: ...1 TRX0 S18 GBE1_MDI0 Bi Dir GBE MDI AR8031 TRX0 S19 GBE1_LINK100 Out OD CMOS 3 3V AR8031 LED_LINK10_100 S20 GBE1_MDI1 Bi Dir GBE MDI AR8031 TRX1 S21 GBE1_MDI1 Bi Dir GBE MDI AR8031 TRX1 S22 GBE1_LINK1...

Страница 37: ...ACT CMOS 3 3V S55 USB5_EN_OC Bi Dir OD PU 10k CMOS 3 3V USB hub PRTPWR5 OCS5 S56 ESPI_IO_2 Bi Dir CMOS 1 8V LS1028A XSPI1_A_DATA2 S57 ESPI_IO_3 Bi Dir CMOS 1 8V LS1028A XSPI1_A_DATA3 S58 ESPI_RESET Ou...

Страница 38: ...S94 DP0_LANE0 Out LVDS LCD S95 DP0_AUX_SEL In CMOS 1 8V S96 DP0_LANE1 Out LVDS LCD S97 DP0_LANE1 Out LVDS LCD S98 DP0_HPD In CMOS 1 8V S99 DP0_LANE2 Out LVDS LCD S100 DP0_LANE2 Out LVDS LCD S101 GND G...

Страница 39: ...PTN3456I CPLD BKLTEN IO_C1 S128 LVDS0_1 eDP0_TX1 DSI0_D1 Out Serial 0R LVDS LCD PTN3460I LS1028A LVSBO_P DP_LANE1 S129 LVDS0_1 eDP0_TX1 DSI0_D1 Out Serial 0R LVDS LCD PTN3460I LS1028A LVSBO_N DP_LANE...

Страница 40: ...GER_PRSNT In PU CPLD CMOS 1 8V CPLD IO_F10 S153 CARRIER_STBY Out Serial 825R PD 1k CMOS 1 8V CPLD IO_L6 S154 CARRIER_PWR_ ON Out CMOS 1 8V power circuit S155 FORCE_RECOV In PU 4k75 CMOS 1 8V CPLD IO_B...

Страница 41: ...ip select 0 to boot from the connected SPI NOR flash If the CPLD is not active or if the boot process did not work from I2C1 the SL1028A boot selection pins can be pulled to XSPI1_A bus which is the d...

Страница 42: ...typical 400 ms at low level Power Button Event Pressing the power button for at least 4 seconds will turn off power to the module Power Button Override The module starts automatically after power up t...

Страница 43: ...RSNT are connected to the CPLD and accessible through CPLD GPI register 0x1B SLEEP CPLD register 0x1B bit 2 BATLOW CPLD register 0x1B bit 3 LID CPLD register 0x1B bit 4 CHARGING CPLD register 0x1B bit...

Страница 44: ...es base tar gz tar xzf path to sources sources meta kontron sal28 tar gz This will create sources subdirectory populated with metadata layers 4 Set up Yocto build environment cp sources meta kontron s...

Страница 45: ...riables boot_targets which can be set to mmc0 to boot from SD mmc1 to boot from eMMC nvme0 to boot from NVMe disk usb0 to boot from USB storage carrier which can be set to ads2 if variant 3 or variant...

Страница 46: ...etenv command and boot Linux from TFTP server on host by executing setenv bootargs default_hugepagesz 2m hugepagesz 2m hugepages 256 video 1920x1080 32 60 cma 256M root dev nfs rw ip dhcp nfsroot host...

Страница 47: ...setenv image Image setenv fdt_file sl28 var34 ads2 dtb 6 Execute the following commands setenv bootargs root dev mmcblk1p2 rootwait default_hugepagesz 2m hugepagesz 2m hugepages 256 video 1920x1080 cm...

Страница 48: ...o gpio405 direction while true do echo 0 sys class gpio gpio405 value sleep 1 echo 1 sys class gpio gpio405 value sleep 1 done Or via modern dev gpiochip interface information about which and correspo...

Страница 49: ...wing options can be configured via device tree RS232 cpld_gpio1 rs485 gpio gpio hog gpios 0 GPIO_ACTIVE_HIGH output low rs232 gpio gpio hog gpios 1 GPIO_ACTIVE_HIGH output low lpuart1 RS485 half duple...

Страница 50: ...interface as dev spidev2 https elixir bootlin com linux v4 14 source Documentation spi spidev ESPI on SMARC connector is handled by Flex SPI controller driver This controller is optimized for SPI NOR...

Страница 51: ...mode following commands can be used ifconfig can0 down ip link set can0 type can fd off ip link set can0 type can bitrate 1000000 NOTE bitrate should be adjusted ifconfig can0 up 8 8 Video Output DP...

Страница 52: ...onifgured as INPUT and shouldn t be accessed 8 10 Thermal Management 8 10 1 Heatspreader and Cooling Solutions A heatspreader plate assembly is available from Kontron for the SMARC sAL28 The heatsprea...

Страница 53: ...and aggregated into bridge ip link add name br0 type bridge ifconfig br0 up ip link set swp0 master br0 ip link set swp1 master br0 ip link set swp2 master br0 ip link set swp3 master br0 ip link set...

Страница 54: ...SMARC 2 0 carrier this port is named SER_1 Start a suitable terminal program on your host and attach it to the port connected with the board s serial interface Configure the serial line using 115200...

Страница 55: ...ommands File System Support Commands Kontron Command Extensions Typing help at the bootloader command line prompt will show up a list of the commands available Typing help command will show specific c...

Страница 56: ...dt reset reset watchdog timer wdt expire flags expire watchdog timer immediately 9 5 Bootloader Environment The bootloader environment is used to control bootloader and OS startup behavior Environment...

Страница 57: ...efault memory location for OS boot A typical user modification would be to set the variable bootcmd to change OS boot commands 9 6 Bootloader Environment Update On the SMARC sAL28 it is possible to up...

Страница 58: ...given file into board memory ext2load fatload However U Boot also provides generic commands ls and load that will detect the file system on the device and use appropriate file system functions automa...

Страница 59: ...device contents implements a SMBIOS Running time data block type 161 as defined in the KEU EEPROM Specification Rev 1 4 The running time data block structure implements a 64bit boot counter U Boot on...

Страница 60: ...eld responsible for any loss or damage caused to the equipment received without an RMA number The buyer accepts responsibility for all freight charges for the return of goods to Kontron s designated f...

Страница 61: ...and ESD protection Goods returned to Kontron Europe GmbH in non proper packaging will be considered as customer caused faults and cannot be accepted as warranty repairs 4 Include the RMA Number with t...

Страница 62: ...EMI Electromagnetic Interference eMMC embedded Multimedia Card EPDC Electronic Paper Display Controller ESD Electrostatic Discharge GPIO General purpose input output HDA High Definition Audio HDMI In...

Страница 63: ...ucts and tailor made solutions based on highly reliable state of the art embedded technologies Kontron provides secure and innovative applications for a variety of industries As a result customers ben...

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