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CP6003-SA
Functional Description
ID 1044-9757, Rev. 2.0
Page 2 - 5
P R E L I M I N A R Y
•
SPI flash interface support
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Low Pin Count (LPC) interface
•
Power management logic support
•
Enhanced DMA controller, interrupt controller, and timer functions
•
System Management Bus (SMBus) compatible with most I²C™ devices
•
DMI 2.0 with 5 GT/s and FDI interfaces to the processor
•
Intel® High Definition Audio (HDA) interface
•
Analog display port
•
Three digital display ports (only two ports are used on the CP6003-SA)
•
Integrated RTC
2.4
Timer
The CP6003-SA is equipped with the following timers:
•
Real-Time Clock
The Intel® QM67 chipset integrates an MC146818B-compatible real-time clock with
256 byte CMOS RAM. All CMOS RAM data remain stored in an additional EEPROM
device to prevent data loss.
•
Counter/Timer
Three 8254-style counter/timers are included on the CP6003-SA as defined for the PC/AT.
•
The Intel® QM67 chipset integrates eight high-precision event timers.
2.5
Watchdog Timer
The CP6003-SA provides a Watchdog timer that is programmable for a timeout period ranging
from 125 ms to 4096 s in 16 steps. Failure to trigger the Watchdog timer in time results in a
system reset or an interrupt. In dual-stage mode, a combination of both interrupt and reset if
the Watchdog is not serviced. A hardware status flag will be provided to determine if the Watch-
dog timer generated the reset.
2.6
Battery
The CP6003-SA is provided with a 3.0 V “coin cell” lithium battery for the RTC. For further infor-
mation concerning the battery and its replacement, refer to Chapter 3.7, Battery Replacement.
2.7
Reset
The CP6003-SA is automatically reset by a precision voltage monitoring circuit that detects a
drop in voltage below the acceptable operating limit or in the event of a power failure of the
DC/DC converters. Other reset sources include the Watchdog timer and the push-button switch
on the front panel. The CP6003-SA responds to any of these sources by initializing local pe-
ripherals.
A reset will be generated if one the following events occurs:
•
Drop in voltage below the acceptable operating limit
•
Power failure of at least one onboard DC/DC converter
•
Push-button "RESET" pressed (on the front panel)
•
Watchdog expired
•
CPCI backplane PRST input
•
CPCI backplane RST input (software-configurable when the board is in peripheral mode)
Содержание CP6003-SA
Страница 19: ...CP6003 SA Introduction ID 1044 9757 Rev 2 0 Page 1 1 Introduction Chapter 1 1 P R E L I M I N A R Y...
Страница 71: ...CP6003 SA Installation ID 1044 9757 Rev 2 0 Page 3 1 Installation Chapter 1 3 P R E L I M I N A R Y...
Страница 83: ...CP6003 SA Configuration ID 1044 9757 Rev 2 0 Page 4 1 Configuration Chapter 1 4 P R E L I M I N A R Y...
Страница 102: ...Configuration CP6003 SA Page 4 20 ID 1044 9757 Rev 2 0 P R E L I M I N A R Y This page has been intentionally left blank...
Страница 103: ...CP6003 SA Power Considerations ID 1044 9757 Rev 2 0 Page 5 1 Power Considerations Chapter 1 5 P R E L I M I N A R Y...
Страница 111: ...CP6003 SA Thermal Considerations ID 1044 9757 Rev 2 0 Page 6 1 Thermal Considerations Chapter 1 6 P R E L I M I N A R Y...
Страница 121: ...CP6003 SA CP6003 SA MK2 5SATA ID 1044 9757 Rev 2 0 Page A 1 CP6003 SA MK2 5SATA Appendix 1 A P R E L I M I N A R Y...
Страница 127: ...CP6003 SA SATA Flash Module ID 1044 9757 Rev 2 0 Page B 1 SATA Flash Module Appendix 1 B P R E L I M I N A R Y...