COMe-mAL10 – User Guide, Rev. 1.3
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Function
Second level Sub-Screen / Description
PCI Express
Configuration>
(continued)
PCI Root Port 1
(GbE)>
or
PCI Root Port 3
(COMe PCIe#0)>
or
PCI Root Port 4
(COMe PCIe#1)>
or
PCI Root Port 5
(COMe PCIe#2)>
or
PCI Root Port 6
(COMe PCIe#3)>
(continued)
SECE>
Root PCI Express System Error on
correctable error
[Enabled, Disabled]
PME SCI>
PCI Express PME SCI
[Enabled, Disabled]
Hot Plug>
PCI Express hot plug
[Enabled, Disabled]
PCIe Speed>
Configures PCIe speed
[Auto, Gen 1, Gen2]
Transmitter
Half Swing>
Transmitter half swing
[Enabled, Disabled]
Extra Bus
Reserved>
Extra bus reserved for bridges behind this
root bridge. (0-7)
Reserved
Memory>
Reserved memory and prefetchable
memory for this root bridge
Range: (1 MB-20 MB)
Reserved I/O>
Reserved I/O for this root bridge
Range: (4 k, 8 k, 16 k, 20 k)
PCH PCIE1 LTR>
PCH PCIE latency reporting
[Enabled, Disabled]
Snoop Latency
Override>
Snoop latency override or Non Snoop
override for PCH PCIE.
Disabled: disables override
Manual: manually enters override values
Auto: maintains default BIOS flow.
[Disabled, Manual, Auto]
Non Snoop
Latency
Override>
PCIE1 LTR Lock>
PCIE LTR configuration lock
[Enabled, Disabled]
PCIE Selectable
De-emphasis>
Selects level of de-emphasis for an
upstream component, if the Link operates
at 5.0 GT/s speed.
1b – 3.5 dB
0b – 6 dB
[Enabled, Disabled]
SATA Drivers>
Chipset SATA>
Enables or disables the Chipset SATA controller.
Chipset SATA controller supports two black internal SATA ports
(up to 3 Gb/s per port.)
[Enabled, Disabled]
SATA Test Mode>
Test mode
[Enabled, Disabled]
Aggressive LPM>
Enable PCH to aggressively enter link power state
[Enabled, Disabled]
