Kiwi TLM991, Руководство пользователя

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Kiwi-tec
Confidential Documentation 4
1.5. Pin Assignment
PIN
Accessory port
signal name
Signal
Direction
Original
PCIe
Signal(4)
PCIe
Direction
Accessory Port Signal
Description
1 DC_NINT2 O WAKE# O
Interrupt Output from
Accessory Card(4)
2 3.3V S +3.3V S 3.3V (from base board)
3 DC-NINT1 O COEX1 I/O
Interrupt Output from
Accessory Card(4)
4 GND R GND R Ground
5 SDIO_CMD/SPI_MOSI I COEX2 I
SDIO Command or SPI Master
Out Slave In (1,2,3,4)
6 TBD1 I +1.5V S
Uncommitted (Connected to
processor GPIO pin)
7 SDIO_D0/SPI_MISO I/O or O CLKREQ# O
SDIO Data 0 or SPI Master In
Slave Out(1,2,3,4)
8 TBD2 I UIM_PWR O
Uncommitted (Connected to
processor GPIO pin)
9 GND R GND R Ground
10 TBD3 O
UIM_DAT
A
I/O
Uncommitted (Connected to
processor GPIO pin)
11 SDIO_D3/SPI_NCS0 I/O or I REFCLK- O
SDIO Data 3 or SPI Chip
Select 0 (1,2,3,4)
12 SDIO_D2/SPI_NCS2 I/O or I COEX2 I/O
SDIO Data 2 or SPI Chip
Select 2 (1,2,3,4)
13 SDIO_CLK/SPI_CLK I I
SDIO Data2 or SPI clock
(1,2,3,4)
14 GPIO1 I/O
UIM_RES
ET
O General Purpose I/O 1
15 GND R GND R Ground
16 SDIO_D1/SPI_NCS1 I/O or I COEX1 I/O
SDIO Data 1 or SPI Chip
Select1 (1,2,3,4)
17 TBD5 R UIM_C8 U
Uncommitted (Connected to
processor GPIO pin)
18 GND R GND R Ground
19 TDB6 R UIM_C4 U
Uncommitted (Connected to
processor GPIO pin)
20
SPI_NCS3/W_DIASABLE
#
I/O
W_DISAB
LE#
I
SPI Chip Select 3 or
W_DISABLE# depending on
build option (1,2,3,4)
21 GND R GND R GND
22 NDC_RESET I PERST# I Low Active Reset
23 5V R PERn0 I/O 5V (From Base Board) (4)
24 3.3V S +3.3V S 3.3V (From Base Board)(4)
25 5V R PERp0 I/O 5V (From Base Board)(4)
26 GND R GND R Ground
27 EEPROM A1 R GND R ID EEPROM Address Bit 1(4)
28 GPS_PPS I +1.5V S GPS Pulse Per Second (4)
29 EEPROM A2 R GND R ID EEPROM Address Bit 2(4)
30 I2CCLK I/O SMB_CLK I/O I2C Clock