Keysight M8040A High-Performance BERT Getting Started Guide
21
Introduction
1
CTRL OUT A, B
The data module has 2 control output at the front panel.
•
Ctrl Out A is the control output of channel 1.
•
Ctrl Out B is the control output of channel 2.
•
A pattern sequence that is using CTRL OUT A or CTRL OUT B will always
drive all the control outputs of the channels that execute the pattern
sequence. For independent control of Ctrl Out A and B, use independent
sequences for channel 1 and 2.
SYNC OUT A,B
This output is used to synchronize two or more modules to a common system
clock. It is connected to the SYNC IN of the other module or to the M8192A if
more than two modules are used.
CLK IN
Clock not used for M8045A.
REF CLK IN
Reference clock input for applications that provide a host reference clock in the
range of 10 MHz … 16 GHz. It may be SSC modulated and is used as the
reference for the system clock of all TX and RX channels. A SSC tolerant PLL is
used to multiply the reference clock to the system clock.
REF CLK OUT
The reference clock output is used to provide a 10 MHz or 100 MHz reference
clock to the DUT or other test equipment.
AUX IN
Port not in use.
CLK OUT
Differential clock output.
TRIG OUT
This output is used to send a trigger signal to another connected device, such as
an oscilloscope.
CLK MOD IN
Input for delay modulation of TRIG OUT and CLK OUT channel, always affects
both outputs.
SYS IN A, SYS IN B
These are control inputs at system level and can be used to generate events for
the sequencer. The granularity is the vector size.
SYS OUT A, SYS OUT B
These are control outputs at system level and can be used to signal events to
the DUT or external instruments. The granularity is the vector size.
Component
Description
Содержание M8000 Series
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