Keysight Technologies M8131A, Руководство пользователя

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86 Keysight M8131A 16/32 GSa/s Digitizer User’s Guide
4 Remote Programming
Status Commands
This section describes the structure of the SCPI status system used by the
M8131A. The status system records various conditions and states of the
instrument in several register groups as shown on the following pages.
Each of the register groups is made up of several low level registers called
Condition registers, Event registers, and Enable registers which control the
action of specific bits within the register group.
These groups are explained below:
A condition register continuously monitors the state of the instrument. The
bits in the condition register are updated in real time and the bits are not
latched or buffered. This is a read-only register and bits are not cleared
when you read the register. A query of a condition register returns a
decimal value which corresponds to the binary-weighted sum of all bits set
in that register.
An event register latches the various events from changes in the condition
register. There is no buffering in this register; while an event bit is set,
subsequent events corresponding to that bit are ignored. This is a read
only register. Once a bit is set, it remains set until cleared by query
command (such as
STAT:QUES:EVEN?
) or a
*CLS
(clear status)
command. A query of this register returns a decimal value which
corresponds to the binary-weighted sum of all bits set in that register.
An enable register defines which bits in the event register will be reported
to the Status Byte register group. You can write to or read from an enable
register. A
*CLS
(clear status) command will not clear the enable register
but it does clear all bits in the event register. A
STAT:PRES
command
clears all bits in the enable register. To enable bits in the enable register to
be reported to the Status Byte register, you must write a decimal value
which corresponds to the binary weighted sum of the corresponding bits.
Transition Filters are used to detect changes of the state in the condition
register and set the corresponding bit in the event register. You can set
transition filter bits to detect positive transitions (PTR), negative transitions
(NTR) or both. Transition filters are read/write registers. They are not
affected by
*CLS
.