Kenwood TK-8302, Руководство по обслуживанию

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TK-8302/8302H
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4. PLL Frequency Synthesizer
The PLL circuit generates the fi rst local oscillator signal
for reception and the RF signal for transmission.
4-1. PLL Circuit
The frequency step of the PLL circuit is 5 or 6.25kHz.
A 19.2MHz reference oscillator signal is divided at IC1 by
a fi xed counter to produce the 5 or 6.25kHz reference fre-
quency. The voltage controlled oscillator (VCO) output signal
is buffer amplifi ed by Q9, then divided by a programmable
counter in IC1.
The divided signal is compared in phase with the 5 or
6.25kHz reference signal in the phase comparator in IC1.
The output signal from the phase comparator is filtered
through a low-pass fi lter and passed to the VCO to control
the oscillator frequency.
4-2. VCO Circuit
The operating frequency is generated by Q6 in transmit
mode and Q4 in receive mode. The oscillator frequency is
controlled by applying the VCO control voltage, obtained
from the phase comparator to the varactor diodes (D4 in
transmit mode and D5 in receive mode) and assist voltage
to the (D6, D8 and D9 in transmit mode and D7, D10 and
D11 in receive mode).
The TX/RX pin is set high in receive mode causing Q5 to
turn off, and turn Q7 on. The TX/RX pin is set low in trans-
mit mode. The outputs from Q4 and Q6 are amplifi ed by Q9
and sent to the RF amplifi ers.
D4
D6,D8,D9
D7,D10,D11
ASTC
IC2
Assist
voltage
Q6
TX VCO
Q9
BUFF
AMP
D5
Q4
RX VCO
Q5,Q7
T/R SW
Charge
pump
OP
AMP
LPF
Phase
comparator
1/M
1/N
REF
OSC
19.2MHz
PLL
DATA
IC1: PLL IC
Q3
Doubler
AMP
4-3. Unlock Circuit
During reception, the 9RC signal goes high, the 9TC sig-
nal goes low, and Q711 turns on. Q713 turns on and a volt-
age is applied to the collector (9R). During transmission, the
9RC signal goes low, the 9TC signal goes high and Q712
turns on. Q714 turns on and a voltage is applied to 9T.
The MCU in the control unit monitors the PLL (IC1) LD
signal directly. When the PLL is unlocked during transmis-
sion, the PLL LD signal goes low. The MCU detects this
signal and makes the 9TC signal low. When the 9TC signal
goes low, no voltage is applied to 9T, and no signal is trans-
mitted.
IC702
MCU
Q711
SW
Q713
SW
IC1
PLL
Q712
SW
Q714
SW
LD
9RC
9C
9R 9T
9TC
PLL lock
: LD “H”
Fig. 9 Unlock circuit
Fig. 8 PLL circuit
5. Control Circuit
The MCU carries out the following tasks:
1) Controls the WIDE, NARROW, TX/RX outputs.
2) Controls the baseband IC (IC701).
3) Controls the PLL (IC1).
4) Controls the display unit
IC1
LED driver
BLED
C.DATA
R.DATA
SLK
IRQ
CSN
Display unit
IC702
MCU
IC701
Baseband IC
GLED
RLED
MBL
LECI LECE LECL LELH
IC1
PLL
PLLE PLDT PLCK UL
Fig. 10 Control circuit
CIRCUIT DESCRIPTION