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TK-8100
23
Frequency Configuration
The receiver utilizes double conversion. The first IF is
49.95MHz and the second IF is 450kHz. The first local oscil-
lator signal is supplied from the PLL circuit.
The PLL circuit in the transmitter generates the necessary
frequencies. Figure 1 shows the frequencies.
Receiver System
The receiver is double conversion superheterodyne. The
frequency configuration is shown in Figure 1.
■
Front-end RF Amplifier Circuit
An incoming signal from the antenna is applied to an RF
amplifier (Q353) after passing through a transmit/receive
switch circuit (D604 and D605 are off) and a BPF (L359, L358,
L360, L361 and varactor diodes : D353, D354, D355). After
the signal is amplified (Q353), the signal is filtered by a BPF
(L354, L355 and varactor diodes: D351, D352) to eliminate
unwanted signals before it is passed to the first mixer.
The voltage of these diodes are controlled by tracking the
CPU (IC101) center frequency of the band pass filter. (See
Fig. 2)
■
First Mixer Circuit
The signal from the RF amplifier is heterodyned with the
first local oscillator signal from the PLL frequency synthesizer
circuit at the first mixer (Q352) to create a 49.95MHz first
intermediate frequency (1st IF) signal. The first IF signal is
then fed through one pair of monolithic crystal filter (MCF :
XF351) to further remove spurious signals.
ANT
SW
RF
AMP
1st
MIX
AF
PA
TCXO
MIC
AMP
X3
multiply
RF
AMP
POWER
AMP
CF 450kHz
MCF
49.95MHz
IF SYSTEM
PLL/VCO
16.8MHz
50.4MHz
ANT
RX
TX
SP
MIC
Fig. 1 Frequency configuration /
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ANT
L358~361
D353~355
BPF
Q353
RF AMP
Q351
IF AMP
IC161
D/A CONVERTER
Q352
MIX
XF351
MCF
D602
D604
D605
ANT
SW
IC161
D/A
Q302
X3 multiply
X401
TCXO
IC301
IF system
1st local
OSC (VCO/PLL)
W/NO
(EVOL2)
CF301 (Wide)
CF302 (Narrow)
TV
CPU
L354,355
D351,352
BPF
Fig. 2 Receiver system /
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CIRCUIT DESCRIPTION /
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