Kenwood TK-2107, Руководство по обслуживанию

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TK-2107
TK-260 :K, K2
Item Rating
Nominal center frequency 38.850MHz
Pass band width
±
7.5kHz or more at 3dB
40dB stop band width
±
40.0kHz or less
Ripple 1.0dB or less
Insertion loss 3.0dB or less
Guaranteed attenuation 80dB or more at fo -1000kHz
Terminal impedance 1200
Ω
/ 1.4PF
Item Rating
Nominal center frequency 450kHz
6dB band width
±
7.5kHz or more
50dB band width
±
15kHz or less
Ripple 2.0dB or less at fo
±
5kHz
Insertion loss 6.0dB or less
Guaranteed attenuation 35.0dB or more at fo
±
100kHz
Terminal impedance 1.5 k
Ω
XF200:L71-0535-05 CF200:L72-0979-05
5) Squelch
Part of the AF signal from the IC enters the FM IC again,
and the noise component is amplified and rectified by a filter
and an amplifier to produce a DC voltage corresponding to the
noise level.
The DC signal from the FM IC goes to the analog port of the
microprocessor (IC403). IC403 determines whether to output
Fig. 3 AF Amplifier and squelch
FM IF IC
IC200
IF AMP DET
DET
HPF
AMP
LPF
IC301
QT/DQT
Q303
W/N SW
IC403
MPU
BUSY
MUTE AFCO
TI
6 5 67 62
AF AMP
IC300
LPF HPF
Q302
SW
IC302
AF PA AMP
Q307
SW
SW
SP
Q304, 305, 306
sounds from the speaker by checking whether the input
voltage is higher or lower than the preset value.
To output sounds from the speaker, IC403 sends a high
signal to the MUTE and AFCO Iines and turns IC302 on
through Q302, Q304, Q305, Q306 and Q307.(See Fig. 3)
6) Receive signaling
QT/DQT
300 Hz and higher audio frequencies of the output signal
from IF IC are cut by a low-pass filter (IC301). The resulting
signal enters the microprocessor (IC403). IC403 determines
whether the QT or DQT matches the preset value, and
controls the MUTE and AFCO and the speaker output sounds
according to the squelch results.
3. PLL frequency synthesizer
The PLL circuit generates the first local oscillator signal for
reception and the RF signal for transmission.
1) PLL
The frequency step of the PLL circuit is 5 or 6.25kHz.
A 12.8MHz reference oscillator signal is divided at IC1 by a fixed
counter to produce the 5 or 6.25kHz reference frequency. The
voltage controlled oscillator (VCO) output signal is buffer
amplified by Q6, then divided in IC1 by a dual-module
programmable counter . The divided signal is compared in phase
with the 5 or 6.25kHz reference signal in the phase comparator in
IC1. The output signal from the phase comparator is filtrered
through a low-pass filter and passed to the VCO to control the
oscillator frequency. (See Fig.4)
CIRCUIT DESCRIPTION