Kenwood DVR-8100, Руководство по обслуживанию

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DVR-8100
12
CIRCUIT DESCRIPTION
Pin No. Pin Name I/O Pin Description
1,12,23 VD(1~3) - Digital positive supplies. Nom2.5V
2,13,24 DGND(1~3) - Digital ground.
3 AUDATA3 0 Unused.
4 WR I/O
Host Write Strobe, Host Data Strobe, External Memory Write Enable or
General Purpose Input.
5 RD I/O
Host Parallel Output Enable, Host parallel R/W, External Memory Output Enable,
General Purpose Input.
6 A1 1 Host address bit one or SPI serial control data input.
7 A0 I Host parallel address bit zero or serial control pin clock.
8~11
EMA(D7~D0) I/O Data bus (7~0).
14~17
18 CS I Chip select input.
19 SCDI0 I/O Serial control data input and output.
20 ABOOT I/O Control pin interrupt request, automatic boot enable.
21 EXTMEM I/O External memory chip select input/output.
22 SDATAN I PCM audio data input.
25 SCLKN1 I/O PCM audio input bit clock.
26 LRCLKN1 I/O PCM audio input sample rate clock.
27 CMPDAT I PCM audio data input.
28 CMPCLK I/O PCM audio input bit clock.
29 CMPREQ I/O PCM audio input sample rate clock.
30 CLKIN I Master clock input.
31 CLKSEL I DSP clock select.
32 FLT2 - Phase locked loop filter.
33 FLT1 - Phase locked loop filter.
34 VA - Analog positive power supply for clock generator. Nom2.5V
35 AGND - Analog ground for clock generator PLL.
36 RESET I Master reset input.
37 DD I/O This pin should be pulled up with an external 4.7k
Ω
resistor.
38 DC I This pin should be pulled up with an external 4.7k
Ω
resistor.
39 AUDATA2 O Digital audio output 2.
40 AUDATA1 O Digital audio output 1.
41 AUDATA0 O Digital audio output 0.
42 LRCLK I/O Audio output sample rate clock.
43 SCLK I/O Audio output bit clock.
44 MCLK I/O Audio master clock.
Pin No. Pin Name I/O Pin Description
32 LIN I Lch Analog Input Pin
33 RIN I Rch Analog Input Pin
34 PVDD - PLL Power Supply Pin, 4.5V~5.5V
35 R - External Resistor Pin
36 PVSS - PLL Ground Pin
37 RX4 I Receiver channel 4 Pin (Internal biased pin)
38 SLAVE I
Slave Mode Pin
"L" : Master mode or Slave mode, "H" : Slave mode
39 RX3 I Receiver channel 3 Pin (Internal biased pin)
40 TST I
Test Pin
This pin should be connected to DVSS.
41 RX2 I Receiver channel 2 Pin (Internal biased pin)
42 I2C I
Control Mode Select Pin
"L" : 4-wire Serial, "H" : I2 C bus
43 RX1 I Receiver channel 1 Pin (Internal biased pin)
44 PDN I Power Down & Reset Pin
4-8 Digital Audio Decoder : CS493263 (X09, IC9)
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