Keithley SourceMeter 3A 2420, Руководство по обслуживанию

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4-8 Troubleshooting
The Model 2420 output stage serves two purposes: (1) it converts signals from floating com-
mon to output common, and (2) it provides both voltage and current amplification. The output
stage drive transistors are biased in class B configuration to prevent the possibility of thermal
runaway with high-current output values.
Output transistors Q518 and Q521 are cascoded with output MOSFETs Q516 and Q523. All
other MOSFETs and transistors are slaves, and the voltages across these devices are determined
by the resistor-capacitor ladder circuits shown. High-current drive capability is provided by
Q500-Q511. Coarse current limits are built into the output stage.
A/D converter
The SourceMeter unit uses a multi-slope charge balance A/D converter with a single-slope
run-down. The converter is controlled by gate array U610. Commands are issued by the MPU
on the digital board through communications opto-isolators to U610, and U610 sends A/D read-
ing data back through opto-isolators to the digital board for calibration and processing.
Active guard
The Model 2420 has an active guard or "six-wire ohms" circuit used to measure complex de-
vices. This circuitry provides a low-current (50mA) equivalent of the voltage on output HI. If
the unit is in the SV mode, the low-current equivalent of the source voltage will appear on the
guard terminal. If the unit is in the SI mode, the voltage on output HI is equal to the source cur-
rent multiplied by the external resistance value. An equivalent voltage will be generated by the
guard circuit, and a guard sense terminal is provided to sense around the voltage drop in the
guard leads since significant current can flow (50mA).
Digital circuitry
Refer to Figure 4-5 for the following discussion on digital circuitry.
The core digital circuitry uses a Motorola 68332 microcontroller running at 16.78MHz. The
memory configuration includes two 256K X 8-bit flash EEPROMs and two 128K X 8-bit RAMs
used in parallel to utilize the 16-bit data bus of the MPU. The RAM is battery backed-up, pro-
viding continued storage of data buffer information during power-down cycles, and flash ROM
support allows internal firmware upgrades using either the serial or GPIB port for downloading
new firmware. All calibration constants and the save 0 setup are stored in a separate serial EE-
PROM. Setups 1 through 4 are stored in battery backed-up RAM.
External communication is provided via GPIB and serial interfaces. A 9914 GPIB IEEE-488
standard interface IC is used for the GPIB, and a 68332 Queued Serial Module (QSM) provides
the serial UART. For internal communications, the Time Processing Unit (TPU) is used for serial
communications with the front panel display module, and both the TPU and QSM handle digital-
to-analog interfacing.