Keithley KPCMCIA-12AIAOH, Руководство пользователя

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C-4 I/O Registers KPCMCIA-12AIAOH User’s Manual
Mode 0 is the FIFO program mode in which the two consecutive words (four bytes) written into
the register address will set the almost-full and almost-empty thresholds (in bytes). The first word
specifies the almost-empty threshold (not used; can be set to anything), while the second word
determines the almost-full threshold. The threshold should be set to a value from 1 to FIFO size
minus 1 (default is 7 when reset or powered up). Refer to Table C-4.
Mode 1 is the FIFO test mode in which the data bytes can be written into the data FIFO and read
back from it. The FIFO flags (FIFO empty, almost-full, and full flags) will change according to
the data bytes available in the data FIFO and the configured threshold.
Mode 2 should be avoided. The data bytes cannot be written into the FIFO under this mode, while
the bytes read from the FIFO will be the same as in mode 0.
Mode 3 is the data transfer mode. Data bytes will be written into the FIFO by the A/D converter,
while the data byte read from the address is the first available byte in the data FIFO if it is not
empty. Otherwise, the most recent byte written into the FIFO will be returned. The data FIFO reg-
ister is read-only under this mode. You cannot write data bytes into the data FIFO through I/O
instructions.
Mode setting
The FIFO operation mode setting is always initiated by the data FIFO flush command with the
access/program bit set to 0 (bit 0 at base + 7) before the data acquisition is started. See “Command
Register (base + 7, write only).” This will bring it to mode 0 (threshold setting mode). After the
threshold is programmed or verified, set the bit to 1 so the consequent read/write operations to the
FIFO will be taken as data access operations.
The A/D circuit is in idle mode before starting into the run mode by a trigger command (or an arm
command with pre-trigger). For one-shot operation, the A/D circuit will be set to run mode after
it receives the trigger signal. It will not return to the idle mode until the specified scan list is com-
pleted or an A/D stop command is received. See “Command register (base + 7, write only).” For
continuous trigger operation, the A/D circuit will stay in run mode after being triggered (or armed
with the pre-trigger option) until an A/D stop command is received.
Table C-4
Data FIFO threshold setting
Threshold Default Threshold range Suggested value
Almost Empty 7 Irrelevant Irrelevant
Almost Full 7 1..4095 bytes* 2048 bytes*
* 2 bytes per sample/data word