JYTEK USB-61210, Руководство пользователя

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32 Operation & Calibration
*Not used in GPTC
Table 3-3: Timer/Counter Pin Definition
3.1.6 Basic Timer/Counter Function
Each timer/counter has three inputs that can be controlled via hard -
ware or software. They are clock input (GPTC_CLK), gate input
(GPTC_GATE), and up/down control input (GPTC_UD). The GPTC_CLK
input provides a clock source input to the timer/counter. Active edges
on the GPTC_CLK input increment or decrement the counter. The
GPTC_UD input directs the counter to count up or down (high: count up;
low: count down), while the GPTC_GATE input is a control signal acting
as a counter enable or counter trigger signal in different applications.
The GPTC_OUT then generates a pulse signal based on the
timer/counter mode set.
All input/output signal polarities can be programmed by software appli
-
cation. For brevity, all GPTC_CLK, GPTC_GATE, and GPTC_OUT in the fol -
lowing illustrations are assumed to be active high or rising-edge
triggered.
3.1.7 General Purpose Timer/Counter Modes
Ten programmable timer/counter modes are available. All modes initial -
ize following a software-start signal set by the software. The GPTC soft -
ware reset initializes the status of the counter and reloads the initial
value to the counter. The operation remains halted until software start
is executed again. Operations under different modes are described as
follows.
Mode 1: Simple Gated-Event Counting
In this mode, the counter calculates the number of pulses on the GPTC_ -
CLK after a software start. Initial count can be loaded from the software
application. Current count value can be read back by software any time
with no influence on calculation. GPTC_GATE enables/disables calcula -
tion. When GPTC_GATE is inactive, the counter halts the current count
value. Operation in which initial count = 5, countdown mode is shown.
IGND 11 31 N/C*
Pin Pin