Operation Theorem
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Operation Theorem
4.1 Hardware Block Diagram
The
JYTEK
PXI Switch Module features an onboard FPGA for relay switching
control, trigger control, scanlist storage and sequencing. The PXI triggering and
synchronization functions, such as Star Trigger and Trigger Bus are also
supported. In addition to the Trigger In and Scanner Advanced signals for
external instruments handshaking, the switch module provides eight channels
of programmable digital I/O interface to facilitate general purpose control
applications.
To make full use of the flexible trigger and signaling system on the PXI platform,
the switch module has a built-in signal routing matrix that can exchange signals
between front panel digital I/O, Star Trigger, and Trigger Bus.
Figure 7: Hardware Block Diagram
4
Scan Memory
Relay
PXI
Interface
PXI Trigger Bus
Star Trigger In
PX
I Connec
tor
Fr
ont
Connec
tor
Relay
Control
Timing
Control
Signal
Routing
Matrix
Trigger
Control
DIO
Scan-
Advance
Trigger-in
