1-46 (No.XA002)
• Block diagram
NOTE:
The cell array configuration is 2048 * 256 * 32
CLK
CKE
CS
CAS
RAS
WE
A10
A0
A9
BS0
BS1
Clock
buffer
Command
buffer
Address
buffer
Mode
register
Control
signal
generator
Data control
circuit
DQ
buffer
DQ1
DQ31
Column decoder
Cell array
bank #0
Sense amplifier
Row decoder
Column decoder
Cell array
bank #2
Row decoder
Sense amplifier
Column decoder
Cell array
bank #1
Sense amplifier
Row decoder
Column decoder
Cell array
bank #3
Sense amplifier
Row decoder
Refresh
counter
Column
counter
DQM0~3
Содержание XV-N30BK[MK2]
Страница 47: ... No XA002 1 47 ...
Страница 64: ...XV N30BK XV N33SL 2 16 MEMO MEMO ...
Страница 65: ...XV N30BK XV N33SL 2 7 MEMO 2 17 ...