(No.49837)1-27
SECTION 4
Description of major ICs
4.1
AT27C020-70JCU5 (IC102) : 2M-bit (256K x 8) OTP EPROM
• Pin Layout
• Block Diagram
• Pin function
A7
A6
A5
A4
A3
A2
A1
A0
O0
A14
A13
A8
A9
A11
OE
A10
CE
O7
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
14
15
16
17
18
19
20
O1
O2
G
ND
O3
O4
O5
O6
A12
A15
A16
VP
P
VC
C
PG
M
A17
4
3
2
1
32
31
30
OE,CE AND
PROGRAM LOGIC
VCC
GND
VPP
A0 - A17
ADDRESS
INPUTS
OE
CE
PGM
X DECODER
Y DECODER
OUTPUT
BUFFERS
Y-GATING
DATA OUTPUTS
O0 - O7
CELL MATRIX
IDENTIFICATION
Pin No.
Symbol
Function
1
VPP
Power supply
2
A16
Address input
3
A15
Address input
4
A12
Address input
5 to 12
A7 to A0
Address inputs
13 to 15
O0 to O2
Outputs
16
O3 to O7
Outputs
17 to 21
GND
Ground
22
CE
Chip enable
23
A10
Address input
24
OE
Output enable
25
A11
Address input
26
A9
Address input
27
A8
Address input
28
A13
Address input
29
A14
Address input
30
A17
Address input
31
PGM
Program strobe
32
VCC
Power supply
Содержание KD-SV3000
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