KD-S685/KD-S585
1-15
Description of major ICs
PT6523LQ (IC601) : LCD driver
1. Pin layout
2. Block digagram
1 ~ 16
48 ~ 33
32
~
17
49
~
64
COM1
VDD1
COMMON
DRIVER
CLOCK
GENERATOR
ADDRESS
DETECTOR
VDD2
VDD
VSS
INH
OSC
DI
CLK
CE
COM2 COM3
SEGMENT DRIVER & LATCH
SHIFT REGISTER
SG62 -------- SG5 SG4 SG3 SG2 SG1
60
61
62
63
64
I/O
O
O
-
I
I
I
-
I/O
I
I
I
Function
Segment output pin
Common driver output pin
Power supply
Display off control input pin
Used for 2/3 bias voltage when the bias voltages are
provided externally
Used for 1/3 bias voltage when the bias voltages are
provided externally
Ground pin
Oscillation Input/Output pin
Chip enable pin
Synchronization clock
Transfer data pin
VSS
OSC
CE
CLK
DI
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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