RSC-300-TQFP (IC851) : Voice processor
1. Pin layout
3. Pin function
2. Block diagram
1
16
48
33
17 32
64 49
BREAK POINT
REGISTER
TIMING AND
CONTR
OL
32K x 8 HIGH
32K x 8 LO
W
CPU
ST
A
CK SP
A
C
E
REGISTER SP
A
C
E
2K TECHNOLOGY
SRAM
EXTERNAL
MEMORY
INTERFACE
PRE-AMP
SPEECH
PROCESSING
UNIT
ADC
DA
C
ANALOG
CONTR
OL
PULSE
WIDTH
MODULA
T
O
R
OSC1
OSC2
TIMER1
TIMER2
PORT
0
PORT
1
INTERRUPT LOGIC
INTERNAL R
O
M
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
O
O
O
O
O
O
O
O
-
-
O
O
O
O
O
O
O
O
O
I
I
O
O
O
O
O
-
-
-
-
-
-
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Digital ground Connect to ground
Digital power supply Connect to 5V
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Address bus for external memory
Connect to 14.31818MHz
Connect to 14.31818MHz
Reset detection terminal
Address bus 4 for flash memory
Address bus 3 for flash memory
Address bus 2 for flash memory
Address bus 1 for flash memory
Address bus 0 for flash memory
Non connection
Non connection
Non connection
Non connection
Non connection
Non connection
I
O
I
O
I
-
-
O
O
O
O
O
I
I
-
I
I
O
O
I
I
-
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Data enable siganl from 78K0
Dtat request signal for 78K0
Data input signal from 78K0
Data output signal for 78K0
Clock signal from 78K0
Digital power supply Connect to 5V
Digital ground Connect to ground
Read strove of ext. code memory
Write strove of ext. code memory
Read strove of ext. data memory
Write strove of ext. data memory
Power down signal
External high memory enable
External low memory enable
Reference voltage
Microphone input
AGC pre-amp. input
Analog output (non buffering)
3rd pre-amp. output
Low gain analog input
2nd pre-amp. output
Digital ground Connect to ground
Buffered D/A converter output
Test mode or PWM output1
External data bus
External data bus
External data bus
External data bus
External data bus
External data bus
External data bus
External data bus
A15
A14
A13
A12
A11
A10
A9
A8
GND
VDD
A7
A6
A5
A4
A3
A2
A1
A0
XO1
XI1
RESET
FAD4
FAD3
FAD2
FAD1
FAD0
NC
NC
NC
NC
NC
NC
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
ENA
REQ
DI
DO
CLK
VDD
GND
RDC
WRC
RDD
WRD
PDN
XMH
XML
VREF
AIFE1
AIFE2
DACOUT
AOFE3
AIN0
AOFE2
GND
BUF/PWM0
TE/PWM1
D7
D6
D5
D4
D3
D2
D1
D0
Pin
No.
Symbol I/O
Function
Pin
No.
Symbol
I/O
Function
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