JVC AV-48P775/H, Руководство по обслуживанию

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1-24 (No.YA173)
6. CONVER A
Setting the CONVERGENCE PHASE adjustment.
• Setting for 6.CONVER A is described in the CONVERGENCE
adjustment.
• Press [INPUT] key
7. CONVER B
Setting the CONVERGENCE POINT (fine).
• Setting for 7.CONVER B is described in the CONVERGENCE
adjustment.
8. IP
DIST circuit data setting.
[Do not adjust]
9. DSD
DSD circuit data setting.
[Do not adjust]
• Press [SLEEP TIMER] key
0. HDMI
DIGITAL INPUT circuit data setting.
[Do not adjust]
4.4.6 DESCRIPTION OF TEST MODE
(1) Press [SLEEP TIMER] key to set 30 minutes.
(2) While the indication "SLEEP TIMER 30 MIN." is being displayed, Press [DISPLAY] key and [VIDEO STATUS] key
simultaneously to enter the TEST MODE MENU screen as shown in the Fig.1.
(3) Press [ 5 ] key to enter the 5.CONVER OFF.
(4) Press [INPUT] key to select the crosshatch pattern.
SETTING ITEM NAME
SETTING VALUE
CPA01 FINE OFF 0 CPA01 FINE OFF 0 CPA01 FINE OFF 0
CPA01~CPA11
CCA01~CCA12
CBA01~CBA94
6.CONVER A
SETTING ITEM No.
CBA01 CCA01 CPA01
Skip change
7.CONVER B
NTSC FULL ST L FL MUTE
IPA001 0C7
IPA001~IPA042
SETTING ITEM No.
SETTING VALUE
8.IP
9.DSD
NTSC FULL ST L FL MUTE
DSA001 0CF
002
DSA001~DSA053
DSB001~DSB053
DSC001~DSC044
DSD001~DSD017
SETTING ITEM No.
SETTING VALUE
DSD001 DSC001 DSB001 DSA001
Skip change
NTSC FULL ST L FL MUTE
HDM001 000
HDM001~HDM080
RHD001~RHD170
SETTING ITEM No.
SETTING VALUE
0.HDMI
Fig. 2 Fig. 3
1. I
2
C STOP
2. STATUS DISP.
4. SELF-CHK
5. CONVER OFF
TEST MODE
ROM CORRECTION : ACT
ROM VERSION :
Fig. 1
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