26
3-6-1 DRAM Timing Settings
Phoenix – AwardBIOS CMOS Setup Utility
DRAM Timing Settings
Item Help
Auto Configuration
Auto
x DRAM CAS Latency CL-2.5
x RAS Active Time 6T
x RAS Precharge Time 4T
x RAS to CAS Delay Auto
x Bank Interleave Enabled
DRAM Command Rate 2T
Menu Level >>
↑↓→←
Move Enter:/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Optimized Defaults F7:Standard Defaults
DRAM CAS Latency
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on the
DRAM timing. The settings are: 2T and 2.5T.
RAS Precharge Time
If an insufficient number of cycles is allowed for the RAS to accumulate its charge before DRAM
refresh, the refresh may be incomplete and the DRAM may fail to retain date. Fast gives faster
performance; and Slow gives more stable performance. This field applies only when synchronous
DRAM is installed in the system. The settings are: 2T, 3T and 4T.
RAS to CAS Delay
This field let’s you insert a timing delay between the CAS and RAS strobe signals, used when DRAM
is written to, read from, or refreshed. Fast gives faster performance; and Slow gives more stable
performance. This field applies only when synchronous DRAM is installed in the system. The
settings are: 6T, 7T and 8T.
3-6-2 PCIE Timing Settings
Phoenix – AwardBIOS CMOS Setup Utility
PCIE Timing Settings
Item Help
PCIE Reset Delay
Disabled
Internal Video Mode UMA,Hyper Memory
UMA Frame Buffer Size 64MB
AGP Aperture Size 128MB
CFX Clock Mode Async
Async CFX Clock 250MHz
Video Display Devices Auto
TV Standard NTSC
* Surroundview
Disabled
↑↓→←
Move Enter:/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Optimized Defaults F7:Standard Defaults
Internal Video Mode
The settings are: UMA, UMA+Hyper Memory (for A210GDMS PRO), Hyper Memory (for
A210GDMS PRO).
Note: Change these settings only if you are familiar with the chipset.
←
Hyper Memory for A210GDMS PRO
←
No for A210PDMS
←
No for A210PDMS
