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Snapdragon 820 SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.9
Optional Features
2.9.1
JTAG Header
The Snapdragon 820 SMARC SOM supports one JTAG interface for CPU debug purpose. A customized 20-pin ARM JTAG
connector (J4) is available in SOM for JTAG interface. Even though this JTAG connector pinout is fully compatible with
“ARM JTAG 20” connector, the physical dimen
sion of connector is made smaller because of space constraint.
APQ8096
CPU’s JTAG pins are 1.8V tolerant and so 1.8V reference power is provided to pin 1 of the connector to allow
JTAG tool to automatically configure the logic signals for the right voltage. JTAG connector (J4) is physically located on
topside of the SOM. This is the optional feature and will not be populated in default configuration.
Number of Pins
- 20
Connector Part
- GRPB102MWCN-RC from Sullins Connector Solutions
Mating Connector
- LPPB102CFFN-RC from Sullins Connector Solutions
Table 6: JTAG Header Pin Assignment
Pin
No
Signal Name
Signal Type/
Termination
Description
1
VCC_1V8
O, 1.8V Power
VTREF Voltage Reference.
2
VCC_1V8
O, 1.8V Power
Supply Voltage.
3
JTAG_TRSTB
I, 1.8V CMOS/
10K PD
JTAG test reset signal.
4
GND
Power
Ground.
5
JTAG_TDI
I, 1.8V CMOS/
10K PU
JTAG test data input.
6
GND
Power
Ground.
7
JTAG_TMS
I, 1.8V CMOS/
10K PU
JTAG test mode select.
8
GND
Power
Ground.
9
JTAG_TCK
I, 1.8V CMOS/
10K PU
JTAG test Clock.
10
GND
Power
Ground.
11
-
I, 1.8V CMOS/
10K PD
Only pull down is provided.
12
GND
Power
Ground.
13
JTAG_TDO
O, 1.8V CMOS
JTAG test data output.
14
GND
Power
Ground.
15
JTAG_RESETB
I, 1.8V CMOS/
10K PU
Reset input.
16
GND
Power
Ground.
17
-
I, 1.8V CMOS/
10K PU
Only pull up is provided.