REL1.2
Page 46 of 55
iWave Systems Technologies Pvt. Ltd.
i.MX6UL/i.MX6ULL SODIMM SOM Hardware User Guide
3.1.2
Power Input Sequencing
i.MX6UL/i.MX6ULL
SODIMM SOM’s Power Input sequence r
equirement is explained below.
Power up Sequence:
•
VRTC_3V0 must come up at the same time or before VIN_3V3 comes up.
Power down Sequence:
•
VIN_3V3 must go down at the same time or before VRTC_3V0 goes down.
Figure 6: i.MX6UL/i.MX6ULL SODIMM SOM Power Sequence
Table 9: Power Sequence Timing
Item
Description
Value
T1
VRTC_3V0 rise time to VIN_3V3 rise time
≥ 0 ms
T2
VIN_3V3 fall time to VRTC_3V0 fall time
≥ 0 ms
Note: VRTC_3V0
is an optional power and required only if RTC functionality is used.
Important Note: i.MX6UL/i.MX6ULL CPU IO pins should not be externally driven from the carrier board until VIN_3V3
is powered up. Otherwise this can cause internal latch-up and malfunctions due to reverse current flows.
