REL1.2
Page 28 of 55
i.MX6UL/i.MX6ULL SODIMM SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
SODIMM Edge
Connector Pin Name
i.MX6UL/i.MX6ULL
Ball Name/
Pin Number
Signal Type/
Termination
Description
75
UART5_CTS(GPIO1_IO
09)
GPIO1_IO09/
M15
O, 3.3V CMOS
UART5 ready to receive data.
76
USB_OTG1_OC(GPIO1
_IO01)
GPIO1_IO01/
L15
I, 3.3V CMOS
Over current sense for USB OTG1.
77
USB_OTG1_ID(GPIO1_
IO00)
GPIO1_IO00/
K13
I, 3.3V CMOS
USB OTG ID to identify Host & Device.
78
USB_OTG1_PWR(GPIO
1_IO04)
GPIO1_IO04/
M16
O, 3.3V CMOS
Power enable signal to control USB Power
switch, to supply VBUS voltage
79
GND
NA
Power
Ground.
80
NC
NA
-
Default NC.
Note: GPIO1_IO06 is optionally connected to
this pin (for ENET_MDIO) through resistor and
default not populated.
Note: Same signal is by default connected to
On SOM Ethernet PHY’s.
81
USB_OTG_DP
USB_OTG_DP/
U15
IO, DIFF
USB OTG1 data positive.
82
NC
NA
-
NC.
83
USB_OTG_DN
USB_OTG_DN/
T15
IO, DIFF
USB OTG1 data negative.
84
NC
NA
-
NC.
85
NC
NA
-
NC.
86
GPIO5_IO3(SNVS_TA
MPER3)
SNVS_TAMPER3/
P10
IO, 3.3V CMOS Tamper Detection Pin 3 (Or) General purpose
input/output.
Important Note: In i.MX6UL3 SODIMM SOM,
this pin can be used as only Tamper
functionality. In all other i.MX6UL/i.MX6ULL
CPU version SODIMM SOM, this pin can be
used as only GPIO functionality.
87
NC
NA
-
NC.
88
VIN_3V3
NA
I, 3.3V Power
Supply Voltage.
89
JTAG_TDO/SAI2_TX_S
YNC
JTAG_TDI/
N16
O, 3.3V CMOS
Audio transmit frame synchronization.
Note: Same signal is also connected to 191
st
pin of SODIMM edge connector.
90
JTAG_TDI/SAI2_TX_BC
LK
JTAG_TDO/
N15
O, 3.3V CMOS
Audio transmit clock.
Note: Same signal is also connected to 195
th
pin of SODIMM edge connector.
91
NC
NA
-
Default NC.
Note: Boot_Mode0 is optionally connected to
this pin (for GPIO) through resistor and
default not populated.
