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Troubleshooting 

The flash boot loader code is executed every time the CPU is powered or reset. The loader can execute the ISP 
command handler or the user application code. P0.14 is sensed on a rising edge on the RST (CPU reset) pin.  If a 
low level is detected, ISP command handler starts and takes over control of the CPU after reset. If there is no 
request for the ISP command handler execution (a high-level detected), a search is made for a valid user 
program. If a valid user program is found then the execution control is transferred to it. Refer to CPU User 
Manual for more details on CPU startup mode. 

Normally, jumper J25 is set for ‘User mode’ by default. Boot-loader mode should be normally selected only for 
troubleshooting or when the user explicitly wants to use Boot-loader mode. J16 must be removed when Boot-
loader mode is selected (see J16 description for more details).  

There was a case, where the code was programmed in the flash, which disabled the JTAG debug port shortly 
after reset. Due to the NXP implementation, the debugger cannot take over control over the CPU immediately 
after reset, but a part of code is executed before the CPU can be stopped by the debugger. In this particular case, 
the application disabled JTAG port before the debugger took control over the CPU and the debugger could not 
connect to the CPU at all. Thereby, note that if the debugger cannot connect to the CPU (winIDEA reports 
“Cannot stop CPU”), it may be due to bad program in the flash. In this case, Boot-loader mode has to be selected 
(in order for the CPU to start executing ISP command handler), in which the debugger can always stop the 
program and take over control over the CPU. Then a new valid program can be programmed in the flash or flash 
erased. Then the User mode can be used again. 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 
Disclaimer: iSYSTEM assumes no responsibility for any errors which may appear in this document, reserves the 
right to change devices or specifications detailed herein at any time without notice, and does not make any 
commitment to update the information herein. 

©

 iSYSTEM. All rights reserved. 

©

 iSYSTEM, March 2007 

 

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Содержание NXP LPC2138

Страница 1: ..._ V1 7 User s Guide Philips NXP LPC2138 Target Board iSYSTEM March 2007 1 13 Ordering code ITLPC2138 Dimensions 100 x 96 mm Figure 1 ITLPC2138FE Target Board ...

Страница 2: ...3 View of the ITLPC2138 3 Block Diagram 4 Components List 5 Power Supply 5 Jumper Connector Descriptions 6 Connectors 7 Schematic 10 Use of the on board integrated debugger 11 Use of an external debugger 12 Troubleshooting 13 iSYSTEM March 2007 2 13 ...

Страница 3: ...on board integrated iSYSTEM debugger The user can write and debug the application using the on board integrated iSYSTEM debugger which connects to the PC through the USB connection The board requires no external power supply since it s powered from the PC USB port An external ARM7TDMI S debugger including e g ETM support can be used for debugging as an alternative to the on board integrated debugg...

Страница 4: ... 3 ITLPC2138 Block diagram Notes 1 The board provides 16 pin connector for the optional LCD display type CMC216x04 or EW162B0GLY checkout backlight LED polarity which is not included in the package iSYSTEM March 2007 4 13 ...

Страница 5: ... ETM Trace connector P33 JTAG debug connector P34 USB connector integrated debugger P35 DB9 connector serial port UART1 J1 J2 J7 J10 J15 J20 J22 J25 Jumpers LD0 LD3 User LEDs LD11 Power LED 5V LD12 Power LED 3 3V T0 T3 Push buttons Reset T4 Reset button TR2 Trimmer potentiometer R25 R26 Resistors for adjusting LCD contrast See schematic for details Power Supply The target board is powered from the...

Страница 6: ...s the LED driver connecting the on board LEDs to GPIO P0 4 P0 7 J16 User Buttons Enable enables buttons driver connecting the on board buttons to GPIO P0 12 P0 15 Pushing the button generates a low signal If J16 is set the CPU will not start in Boot loader mode see J25 description J17 LCD Enable Signal connects GPIO P0 21 to the LCD enable pin J18 LCD R W Signal connects GPIO P0 22 to the LCD R W ...

Страница 7: ... or EDT EW162B0GLY LCD Pin No Symbol Function 1 GND Ground Terminal 2 Vdd Supply Terminal 3 Vo Power Supply for LCD Driver 4 RS Register Select Signal 5 R W Read Write Selection 6 E Enable Signal 7 DB0 Data Bus Line Not used 8 DB1 Data Bus Line Not used 9 DB2 Data Bus Line Not used 10 DB3 Data Bus Line Not used 11 DB4 Data Bus Line 12 DB5 Data Bus Line 13 DB6 Data Bus Line 14 DB7 Data Bus Line 15 ...

Страница 8: ...Debug ETM Trace Connector P32 Signal Pin Pin Signal Not used 1 2 Not used Not used 3 4 Not used GND 5 6 TRACECLK Not used 7 8 Not used CPU_RESET 9 10 Not used CPU_TDO 11 12 T3V3 GND 13 14 Not used CTCK 15 16 GND CPU_TMS 17 18 GND CPU_TDI 19 20 GND CPU_TRST 21 22 GND GND 23 24 P1 19 GND 25 26 P1 18 GND 27 28 P1 17 GND 29 30 P1 16 GND 31 32 P1 20 GND 33 34 P1 23 GND 35 36 P1 22 GND 37 38 P1 21 An ex...

Страница 9: ...CPU expansion connectors Figure 4 Expansion connectors All CPU signals are available on the expansion connectors which are standard connectors with a 2 54 mm raster iSYSTEM March 2007 9 13 ...

Страница 10: ...Schematic Note On board integrated debugger is not part of the schematic iSYSTEM March 2007 10 13 ...

Страница 11: ...sample workspace for the ITLPC2138 running from the internal flash Connect the USB cable to the PC and to the ITLPC2138 Windows should auto detect a new USB device and install belonging USB driver In case of any problems the driver is located under winIDEA install directory e g c winIDEA 2006 USBDrv Disconnect the USB cable from the ITLPC2138 and then connect it again The two power LEDs should tur...

Страница 12: ... to the ITLPC2138 Windows should auto detect a new USB device and install belonging USB driver In case of any problems the driver is located under winIDEA install directory e g c winIDEA 2006 USBDrv Disconnect the USB cable from the ITLPC2138 and then connect it again The two power LEDs should turn on The target board is not powered if the LEDs don t lit and the problem needs to be resolved before...

Страница 13: ...isabled the JTAG debug port shortly after reset Due to the NXP implementation the debugger cannot take over control over the CPU immediately after reset but a part of code is executed before the CPU can be stopped by the debugger In this particular case the application disabled JTAG port before the debugger took control over the CPU and the debugger could not connect to the CPU at all Thereby note...

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