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Application Note 1634

6

AN

1634.
1

FIGURE 6.  SCHEMATIC OF ISL97671A ISL97672A EVALUATION BOARD

A

B

C

D

D

C

B

A

Title

Size:

Date:
File:

Revision:

Sheet

B

Drawn By:

Error : intersil.bmp file not found.

Terry Nguyen

09/2011

C2 0.1uF

/50V

C7
1uF/10V

L1

15uH(Coilcraft)

D1

PMEG6030

R2A
10K

R1
358K

C9

100pF/50V

C10

nc

C3

J98 (EN)

EN

J4 (SDA)

SDA / FLAG

J3 (SCL)

SCL

J1(Boost in)

Boost Vin

J9A

LX

R6
4.7k

R7
4.7k

J97 (I2C Vlogic)

Vlogic

C4

C5

C6

JP1

C1

10uF

/50V

LED5_1

LED5_2

LED5_3

LED5_4

LED5_5

LED5_6

LED5_7

LED5_8

LED5_9

LED

5_10

LED

5_11

LED

5_12

LED

5_13

LED4_1

LED4_2

LED4_3

LED4_4

LED

4_5

LED4_6

LED4_7

LED

4_8

LED4_9

LED

4_10

LED

4_11

LED

4_12

LED

4_13

LED3_1

LED3_2

LED3_3

LED3_4

LED

3_5

LED3_6

JP_CH5

JP_CH4

JP_CH3

JP_CH2

LED

3_7

LED3_8

LED3_9

LED

3_10

LED

3_11

LED

3_12

LED

3_13

LED2_1

JP_CH1

LED2_2

LED2_3

LED2_4

LED

2_5

LED2_6

LED

2_7

LED

2_8

LED2_9

JP_CH0

LED1_3

LED1_4

LED

1_5

LED1_6

LED1_7

LED

1_8

LED1_9

LED

1_10

LED

1_12

LED

1_13

LED0_1

LED0_2

LED0_3

LED0_4

LED

0_5

LED0_6

LED

2_10

LED

2_11

LED

2_12

LED

2_13

LED1_1

LED

1_11

LED0_7

LED1_2

LED

0_8

LED0_9

LED

0_10

LED

0_11

LED

0_12

LED

0_13

SH2_LED4

SH2_LED3

SH2_LED2

SH2_LED1

SH2_LED0

SH2_LED5

C1

4

1nF

C1

3

1nF

C1

2

1nF

C1

1

1nF

C1

5

1nF

C1

6

1nF

CH4

CH5

C3 ~ C6 : 4.7uF/50V X7R
 ceramic caps
C4~C6 are reserved pads

CH0

CH1

CH2

CH3

J10(Vout)
Vout

JP_OUTPUT

SDA

SCL

J9(VDC)

VDC

For 2 layers
 board, connect
 top layer PGND
 and bottom layer
 AGND at one
 point such that
 using the
 thermal pad as a
 single

SH_LED13

SH_LED12

SH_LED11

SH_LED10

FAULT

1

VIN

2

EN

3

VDC

4

PWM

5

SMBDAT or SDA / FLAG

6

SMBCLK or SCL / NC

7

FPWM / FSW

8

AGND

9

CH0

10

CH1

11

CH2

12

CH3

13

CH4

14

CH5

15

OVP

16

RSET

17

CO

M

P

18

PGND

19

LX

20

PAD

C

U1

ISL97671A/72A

J81 (PWMI_direct)

PWMI

1
2
3
4
5
6
7
8
9
10

HDR1

INTERFACE

1
2
5
6

4

3

Q1

FDMA530PZ

1 2

WR

C18

nc

C19

0.1uF

J99( IC Vin)

IC Vin

IC
 Vin=Bootstrap

IC Vin=
 header

VDC

SCL_S

EN selection

IC VIN selection

SCL_IC

SDA_IC

SCL_IC

EN=IC Vin
(Right)

EN=J98 header
(Left)

SDA_IC

SDA_S

SCL_S

VDC

I2C / FLAG Vlogic selection

Vlogic=J97
 header

Vlogic=VDC
(Right)

1

2

3

JP1A

1

2

3

JP2A

1

2

3

JP3A

1

2

3

JP5A

1

2

3

JP4A

JP91

JP92

VDC

ISET

R13

nc

R15

1M

R16

5K

R14

0

R9

nc

R11

750K

R12

2.21K

R10

0

C20

390pF

R2

10k

C8

3.3nF

ISL97671_2A EVAL SCHEMATIC

SH3-4

nc

SH2-3

nc

SH1-2

nc

SH5-6

nc

SH4-5 nc

SDA_S

SH1_LED4

SH1_LED3

SH1_LED2

SH1_LED1

SH1_LED0

SH1_LED5

Содержание ISL97671A

Страница 1: ...P2A to the right thereby shorting jumper JP2A to the left so that the EN is driven by J98 EN 5 VLOGIC level for I2C can be generated from VDC by connecting jumper JP3A to the right VLOGIC can be driven from J97 VLOGIC by shorting jumper JP3A to the left 6 The configuration of VIN JP1A EN JP2A and VLOGIC JP3A can be quickly found by referring to the table printed on the evaluation board as shown in...

Страница 2: ...to the right thereby shorting jumper JP2A to the left so that EN is driven by J98 EN 5 VLOGIC level can be generated from VDC by connecting jumper JP3A to the right VLOGIC can be driven from J97 VLOGIC by shorting jumper JP3A to the left 6 Configuration of VIN JP1A EN JP2A and VLOGIC JP3A can be quickly found by referring to the table printed on the evaluation board as shown in Figure 3 7 There is...

Страница 3: ...4 3 AN1634 1 FIGURE 3 SETTINGS OF IC VIN ENABLE AND VLOGIC ARE SHOWN ON PCB IN YELLOW RECTANGE ON THE LEFT HAND SIDE CONFIGURATIONS OF 4 DIFFERENT OPERATION MODES ARE LISTED ON PCB IN YELLOW RECTANGE ON THE RIGHT HAND SIDE ...

Страница 4: ...Application Note 1634 4 AN1634 1 FIGURE 4 TOP VIEW OF ISL97671A ISL97672A EVALUATION BOARD ...

Страница 5: ...Application Note 1634 5 AN1634 1 FIGURE 5 BOTTOM VIEW OF ISL97671A ISL97672A EVALUATION BOARD ...

Страница 6: ...LED0_11 LED0_12 LED0_13 SH2_LED4 SH2_LED3 SH2_LED2 SH2_LED1 SH2_LED0 SH2_LED5 C14 1nF C13 1nF C12 1nF C11 1nF C15 1nF C16 1nF CH4 CH5 C3 C6 4 7uF 50V X7R ceramic caps C4 C6 are reserved pads CH0 CH1 CH2 CH3 J10 Vout Vout JP_OUTPUT SDA SCL J9 VDC VDC For 2 layers board connect top layer PGND and bottom layer AGND at one point such that using the thermal pad as a single SH_LED13 SH_LED12 SH_LED11 SH...

Страница 7: ...402 2 21k R12 402 3 3nF C8 402 4 7k R6 603 4 7k R7 603 4 7µF 50V C5 1210 4 7µF 50V C6 1210 4 7µF 50V C3 1210 4 7µF 50V C4 1210 5k R16 402 10k R2A 402 10k R2 402 10µF 50V C1 1210 15µH Coilcraft L1 XAL6060 153MEB 100pF 50V C9 402 358K R1 402 390pF C20 402 750k R11 VRES FDMA530PZ Q1 microFET2x2 INTERFACE HDR1 MOLEX22 05 3101 ISL97671A 72A U1 LPP20 3X4 LED SMT ALL LEDs LW_Y87C PMEG6030 D1 SOD 123W nc ...

Страница 8: ...otice Accordingly the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding For information regarding Intersil Corporation and its products see www intersil com AN1634 1 nc SH5 6 402 nc SH1 2 402 nc SH2 3 402 TABLE 1 BOM FOR ISL97671A ISL97672A EVALUATION BOARD Continued PART TYPE DESIGNATOR FOOTPRINT ...

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