User Guide 113
UG113.0
February 15, 2017
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3
PCB Layout Considerations
The PCB layout is critical for proper operation of the ISL85014.
The following guidelines should be followed to achieve good
performance.
1. Use a multilayer PCB structure to achieve optimized
performance. A four-layer PCB is recommended for this design.
2. Use a combination of bulk capacitors and smaller ceramic
capacitors with lower ESL for the input capacitors, and place
them as close to the IC as possible.
3. Place the VDD decoupling capacitor close to the IC between
VDD and GND. A 1µF
ceramic capacitor is typically used.
4. Place a bootstrap capacitor close to the IC between the BOOT
and PHASE pins. A 0.1µF
ceramic capacitor is typically used.
5. Connect the feedback resistor divider between the output
capacitor positive terminal and AGND pin of the IC, and place
the resistors close to the FB pin of the IC.
6. Connect the GND of the IC to the ground planes underneath
using multiple thermal vias to improve thermal performance.
ISL85014EVAL1Z Evaluation Board
FIGURE 2. TOP VIEW
