11
January 24, 2005
The ISL5585 R
X
gain equations are summarized in Table
A1, and should be used to calculate component values for
receive gains other than the 0dB level implemented on the
evaluation board.
R
X
Gain for the 5V HC55185 and 5V CODEC
The receive gain path block diagram and equations for the
5V HC55185 and 5V CODEC are contained in Appendix B.
The evaluation board is designed for an overall receive gain
of 0dB. The gain path equations (EQ. 8, and EQ. 9) apply to
this configuration. The evaluation board gain of 0dB and is
easily achieved due to the fixed 0dB gain of the RSLIC and
the CODEC.
For receive gains other than 0dB. the HC55185 R
X
gain path
can be configured to that of the ISL5585 as shown in
Appendix A. Both the ISL5585 and HC55185 are pin-
compatible, and have identical AC transmission gain blocks.
When using this alternate configuration with the HC55185,
the gain equations for the 3.3V configuration shown in Table
1A will apply.
The overall receive gain has a strong dependence on the
RSLIC synthesized impedance and the correct impedance
match.
Jumper JP13 selects the R
X
configuration and gain for the
ISL5585 and HC55185 RSLICs.
Transmit Gain Path, T
X
The transmit gain path circuits for both 3.3V and 5V are the
same. However, the gain component values are different due
to differences in the Absolute Voltage Reference Level of the
3.3V and 5V CODECs. The transmit gain block diagram and
equations for the 3.3V ISL5585 and 3.3V CODEC are
contained in Appendix A.
The A-D gain of the complete line circuit is the sum of the
CODEC A-D gain and the RSLIC G
24
T
X
gain.
The receive gain path is defined by the following;
(EQ. 6)
G2W-PCM = G
24
(RSLIC) + G
TX
(CODEC)
The 3.3V and 5V RSLICs have the same T
X
gain which is
fixed at -7.63dB. The CODEC transmit gain path contains 2
gain blocks. An internal T
X
op-amp with external gain setting
resistors feeds the internal T
X
A-D converter. The A-D
converter has a fixed conversion gain needed to restore the
CODEC Absolute Voltage Reference Level to the 0dBm0
standard value of 0.775Vrms at 600
Ω,
at the PCM bus. The
overall line circuit 2W to PCM gain is adjusted using the gain
resistors at the input to the CODEC T
X
op amp.
The 2W - PCM gain is defined by the following:
(EQ. 7)
G
2W-PCM
= G
24
(RSLIC) + G
TX
(op amp) + G
A-D
(CODEC)
For the ISL:5585 and 3.3V CODEC, the TX gain needed for
an overall gain equal to 0dB is given by:
(EQ. 8)
G
TX
(op amp) = 0dB - G
24
(RSLIC) - G
A-D
(CODEC) =
0dB -(-7.63dB) -(5dB) = 2.63dB
For the HC55185 and the 5V CODEC, the TX gain needed
for an overall gain equal to 0dB is given by:
(EQ. 9)
G
TX
(op amp) = 0dB - G
24
(RSLIC) - G
A-D
(CODEC) =
0dB -(-7.63dB) -(0dB) = 7.63dB
The 3.3V and 5V RSLIC/CODEC T
X
gain equations are
summarized in Table A1 and B1 respectively; and should be
used to calculate transmit gains other than the 0dB
implemented on the evaluation board.
The overall transmit gain has a strong dependence on the
RSLIC synthesized impedance and the correct impedance
match.
Jumper JP15 selects the T
X
gain for the ISL5585 and
HC55185 RSLICs.
Trans-hybrid Balance
The trans-hybrid balance network is implemented at the
CODEC Tx amplifier summing input. The network consists of
a pair of resistors that sum the 180
o
out of phase RSLIC 4W
signal from Vtx, with the CODEC Rx signal. The magnitude
of the 4W return signal relative to the CODEC Rx output is
equal to the RSLIC G
44
trans-hybrid gain. Therefore,
complete 4W return signal cancellation occurs when the
trans-hybrid resistor pair ratio produces a gain equal to G
44
as shown in the Hybrid Model diagrams contained in
Appendices A and B.
Trans-hybrid balance performance can be tested using the
PCM4 A11 D-D level test with a 600
Ω
termination at the tip
and ring terminals. The echo-return loss is typically greater
than 23dB.
Jumper JP7 selects the proper transhybrid gain for the
RSLIC/CODEC chip-set used.
Trans-hybrid balance has a strong dependence on RSLIC
impedance matching and accurate T
X
and R
X
gains. In
practice, minor deviations from the design value may occur
due to resistor value rounding to the closest standard value.
Application Note 1168
