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Intel® Xeon Phi™ Coprocessor D

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float reduction(float *data, int size) 

    float ret = 0.f; 

    #pragma offload target(mic) in(data:length(size)) 
    for (int i=0; i<size; ++i) 
    { 
        ret += data[i]; 
    }

 

    return ret; 
}

 

Code Example 2: Serial Reduction with Offload 

Vector Reduction with Offload  

Each core on the Intel® Xeon Phi™ Coprocessor has a VPU. The auto vectorization option is enabled by default 
on the offload compiler. Alternately, as seen in the example below,  the programmer can use the Intel® Cilk™ 
Plus  Extended  Array  Notation  to  maximize  vectorization  and  take  advantage  of  the  Intel®  MIC  Architecture 
core’s 32 512-bit registers.  The offloaded code is executed by a single thread on  a single core. The thread 
uses  the  built-in  reduction  function 

__sec_reduce_add() 

to  use  the  core’s  32  512-bit  vector  registers  to 

reduce the elements in the array sixteen at a time. 
 

float reduction(float *data, int size) 

    float ret = 0; 
    

#pragma offload target(mic) in(data:length(size)) 

    ret = __sec_reduce_add(data[0:size]); //

Intel® Cilk™ Plus  

                                          //Extended Array Notation

 

    return ret; 
}

 

Code Example 3: Vector Reduction with Offload in C/C++ 

Asynchronous Offload and Data Transfer  

Asynchronous offload and data transfer between the host and the Intel® Xeon Phi™ Coprocessor is available.  
For details see the “About Asynchronous Computation” and “About Asynchronous Data Transfer” sections in 
the  Intel®  C++  Compiler  User  and  Reference  Guide  (under  “Key  Features/Programming  for  the  Intel®  MIC 
Architecture”).

 

 

For an example showing the use of asynchronous offload and transfer, refer to

 /

opt/intel/composerxe 

/Samples/en_US/C++/mic_samples/intro_sampleC/sampleC13.c 

 

Note that when using the Explicit Memory Copy Model in C/C++, arrays are supported provided the array 
element type is scalar or bitwise copyable struct or class. So arrays of pointers are not supported.  For C/C++ 
complex data structure, use the Implicit Memory Copy Model. Please consult the section “Restrictions on 
Offload Code Using a Pragma” in the document “Intel C++ Compiler User and Reference Guide” for more 
information.  

Using the Offload Compiler – Implicit Memory Copy Model 

Intel Composer XE 2013 SP1 includes two additional keyword extensions for C and C++ (but not Fortran) that 
provide a “shared memory” offload programming model

 

appropriate for dealing with complex, pointer-based 

Содержание Xeon Phi

Страница 1: ...White Paper Intel Xeon Phi Coprocessor DEVELOPER S QUICK START GUIDE Version 1 7...

Страница 2: ...Intel Xeon Phi Coprocessor If It Hangs 11 Monitoring the Intel Xeon Phi Coprocessor 12 Running an Intel Xeon Phi Coprocessor program from the host system 12 Working directly with the uOS Environment I...

Страница 3: ...Programming on the Intel Xeon Phi Coprocessor OpenMP Intel Cilk Plus Extended Array Notation 23 Parallel Programming on the Intel Xeon Phi Coprocessor Intel Cilk Plus 24 Parallel Programming on Intel...

Страница 4: ...known methods BKMs developed by users at Intel This document does not 1 Cover each tool in detail Please refer to the user guides for the individual tools 2 Provide in depth training Terminology Host...

Страница 5: ...e with the Intel Xeon Phi Coprocessor SCI Symmetric Communications Interface the mechanism for inter node communication within a single platform where an node is a Intel Xeon Phi Coprocessor or an Int...

Страница 6: ...ty such as loading and unloading executables onto the Intel Xeon Phi Coprocessor invoking functions from the executables on the card and providing a two way notification mechanism between host and car...

Страница 7: ...U is a key feature of the Intel MIC Architecture based cores Fully utilizing the vector unit is critical for best Intel Xeon Phi Coprocessor performance It is important to note that Intel MIC Architec...

Страница 8: ...rnel 2 6 32 431 SUSE Linux Enterprise Server SLES 11 SP2 kernel 3 0 13 0 27 default or SUSE Linux Enterprise Server SLES 11 SP3 kernel 3 0 76 0 11 default Section 2 1 in readme txt Be sure to install...

Страница 9: ...If you acquired a serial number for Intel tools go to the Intel Registration Center IRC at http registrationcenter intel com to register and download the products Click the button Register Product wil...

Страница 10: ...MPSS gets started it loads the data collection driver automatically But for some reason if it fails to load the data collection driver you can manually load the driver by going to opt intel vtune_amp...

Страница 11: ...Access to the Intel Xeon Phi Coprocessor after Reboot The Intel Xeon Phi Coprocessor will not start when the host system reboots You will need to manually start the Intel Xeon Phi Coprocessor and then...

Страница 12: ...o Monitoring the Intel Xeon Phi Coprocessor If you want to monitor the load on your coprocessor its temperature etc run the System Management and Configuration SMC utility See section 8 3 of the MPSS...

Страница 13: ...is directory to their default path micinfo provides information about host and coprocessor system configuration micflash updates the flash on the coprocessor saves and retrieves the version and other...

Страница 14: ...l MIC Architecture o Intel Threading Building Blocks Intel TBB o Intel Integrated Performance Primitive Intel IPP Libraries packaged separately include o Intel MPI for Linux OS including Intel Many In...

Страница 15: ...cture Information on Intel MIC Architecture intrinsics can be found in the Compiler Reference Intrinsics section under Intrinsics for Intel MIC Architecture o Release_notes_ _2013SP1_l_en pdf please r...

Страница 16: ...ad opt intel composerxe mkl examples mic_ao blasc and mic_ao blasf o The rest of the samples demonstrate use of MKL via compiler assisted offload opt intel composerxe mkl examples mic_offload Some sam...

Страница 17: ...You can visit the Forum on the Intel Xeon Phi Coprocessor to post questions It can be found at the http software intel com en us forums intel many integrated core Using the Offload Compiler Explicit M...

Страница 18: ...e programmer uses pragma offload target mic as shown in the example below to mark statements offload constructs that should execute on the Intel Xeon Phi Coprocessor The offloaded region is defined as...

Страница 19: ...ode Example 3 Vector Reduction with Offload in C C Asynchronous Offload and Data Transfer Asynchronous offload and data transfer between the host and the Intel Xeon Phi Coprocessor is available For de...

Страница 20: ...hared memory there is no hardware that maps some portion of the memory on the Intel Xeon Phi Coprocessor to the host system The memory subsystems on the coprocessor and host are completely independent...

Страница 21: ...d Reference Guides The section Restrictions on Offload Using Shared Virtual Memory in the document Intel C Compiler User and Reference Guide shows some restrictions of using this programming model Nat...

Страница 22: ...no unusual complications beyond the larger number of threads Parallel Programming on the Intel Xeon Phi Coprocessor OpenMP There is no correspondence between OpenMP threads on the host CPU and on the...

Страница 23: ...et mic in size in data length size omp parallel do reduction ret do i 1 size ret ret data i enddo omp end parallel do FTNReductionOMP ret return end function FTNReductionOMP Code Example 6 Fortran Usi...

Страница 24: ...available to an application built for the Intel MIC Architecture using Intel Cilk Plus wrap the header files with pragma offload_attribute push target mic and pragma offload_attribute pop as follows p...

Страница 25: ...d global data required on the Intel Xeon Phi Coprocessor should be appended by the special function attribute __attribute__ target mic As an example parallel_reduce recursively splits an array into su...

Страница 26: ...CReductionTBB data size return ret Code Example 13 Offloading Intel TBB Code to the coprocessor in C C NOTE Codes using Intel TBB with an offload should be compiled with tbb flag instead of ltbb Using...

Страница 27: ...offload target mic PHI_DEV in A length matrix_elements free_if 0 in B length matrix_elements free_if 0 in C length matrix_elements free_if 0 Code Example 14 Sending the Data to the Intel Xeon Phi Cop...

Страница 28: ...a A N B N beta C N Code Example 17 Controlling Threads on the Intel Xeon Phi Coprocessor Using omp_set_num_threads Intel MKL Automatic Offload Model A few of the host Intel MKL functions are Automatic...

Страница 29: ...ugging Intel MIC Architecture applications under the Debugging with the Intel Debugger on Eclipse and Debugging on the Command Line sections of opt intel composerxe Documentation en_US debugger debugg...

Страница 30: ...efore joining Intel Charles was a consulting software engineer for Oracle Corporation where he concentrated on parallelism and 64 bit support in Windows NT and OpenVMS versions of the Oracle RDBMS on...

Страница 31: ...SUCH MISSION CRITICAL APPLICATION WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN MANUFACTURE OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS Intel may make changes to specif...

Страница 32: ...ions include SSE2 SSE3 and SSE3 instruction sets and other optimizations Intel does not guarantee the availability functionality or effectiveness of any optimization on microprocessors not manufacture...

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