Intel® Server Board SE7505VB2
Clock Generation and Distribution
4. Clock Generation and Distribution
All buses on the Intel Server Board SE7505VB2 operate using synchronous clocks.
Clock
synthesizer/driver circuitry on the baseboard generates clock frequencies and voltage levels as
required, including the following:
100 MHz at 3.3 V logic levels. For Processor 0, Processor 1, Debug Port and MCH.
66 MHz at 3.3 V logic levels: For MCH, ICH4, AGP, and P64H2
48 MHz at 3.3V logic levels: For ICH4
33 MHz at 3.3V logic levels: For ICH4, PCI Connector, sIO and FWH
14.318 MHz at 2.5 V logic levels: For ICH4 and sIO
The following figure illustrates clock generation and distribution on the board.
Revision 1.2
Intel part number C32194-002
31
