42
Evaluation Platform Board Manual
Intel
®
IQ80332 I/O Processor
Hardware Reference Section
3.9.6.4.7
Switch S7A1 - 7: SMBUS Manageability Address Bit 0 corresponding to signal name
PBI_AD17
This allows 80332 to address SMBus Slave Address bit 0 (PBI_A17).
3.9.6.4.8
Switch S7A1 - 8: SMBUS Manageability Address Bit 3 corresponding to signal name
PBI_AD18
This allows 80332 to address SMBus Slave Address bit 3 (PBI_A18).
3.9.6.4.9
Switch S7A1- 9:SMBUS Manageability Address Bit 2 corresponding to signal name
PBI_AD17
This allows 80332 to address SMBus Slave Address2 (PBI_A17).
Table 29.
Switch S7A1 - 9: SMBUS Manageability Address Bit 2: Settings and Operation Mode
3.9.6.4.10
Switch S7A1- 10: SMBUS Manageability Address Bit 1 corresponding to signal
name PBI_AD16
This allows 80332 to address SMBus Slave Address 1 (PBI_A16).
Table 30.
Switch S7A1 - 10: SMBUS Slave Address 0: Settings and Operation Mode
Table 27.
Switch S7A1 - 7: SMBUS Manageability Address Bit 0: Settings and Operation Mode
S7A1-6
Operation Mode
Open
SMBus Manageablity Address Bit 0 = “1” (Default Mode)
Closed
SMBus Manageablity Address Bit 0 = “0”
Table 28.
Switch S7A1 - 8: SMBUS Manageability Address Bit 3: Settings and Operation Mode
S7A1-8
Operation Mode
Open
SMBus Manageablity Address Bit 3 = “1” (Default Mode)
Closed
SMBus Manageablity Address Bit 3 = “0”.
S7A1-9
Operation Mode
Open
SMBus Manageablity Address Bit 2 = “1” (Default Mode)
Closed
SMBus Manageablity Address Bit 2 = “0”.
S7A1-10
Operation Mode
Open
SMBus Manageablity Address Bit 1 = “1” (Default Mode)
Closed
SMBus Manageablity Address Bit 1 = “0”.
