
6
Intel
®
NetStructure
TM
ZT 5515 Compute Processor Board Technical Product Specification
Contents
10
SW3-3 Status ............................................................................................................................. 34
11
SW3-4 Status ............................................................................................................................. 34
12
SW4-3 Status ............................................................................................................................. 35
13
SW4-4 Status ............................................................................................................................. 35
14
SW5 Status................................................................................................................................. 36
15
J-29 Status ................................................................................................................................. 36
16
SMBus Device Details ................................................................................................................ 40
17
Detailed Structure Element Descriptions .................................................................................... 52
18
Absolute Maximum Ratings ........................................................................................................ 61
19
DC Operating Characteristics ..................................................................................................... 62
20
Battery Backup Characteristics .................................................................................................. 62
21
Board Dimensions and Weight ................................................................................................... 63
22
Connector Assignments ............................................................................................................. 64
23
J1 CompactPCI Bus Connector Pinout ...................................................................................... 67
24
J2 CompactPCI Bus Connector Pinout ...................................................................................... 68
25
J3 Connector Pinout ................................................................................................................... 69
26
J5 Rear Panel I/O Connector Pinout .......................................................................................... 70
27
JA1 Ethernet A Connector Pinout............................................................................................... 71
28
J25 VGA Connector Pinout ........................................................................................................ 72
29
J20 Universal Serial Bus 0 Connector Pinout............................................................................. 72
30
J30 COM1 Serial Port Pinout ..................................................................................................... 72
31
J11 PCI Mezzanine Connector Pinout........................................................................................ 73
32
J12 PCI Mezzanine Connector Pinout........................................................................................ 74
33
J14 PCI Mezzanine Connector Pinout........................................................................................ 75
34
J8 IDE Connector Pinout ............................................................................................................ 76
35
Thermal Requirements ............................................................................................................... 77
36
System Register Definitions ....................................................................................................... 79
37
Flash Control (78h) ..................................................................................................................... 80
38
Watchdog (79h) .......................................................................................................................... 81
39
PAL Revision ID (7Bh)................................................................................................................ 82
40
Port 80 BIOS POST Codes (80h) ............................................................................................... 82
41
Switch Monitors (E3h) ................................................................................................................ 83
42
Geographic Addressing (E4h) .................................................................................................... 84
43
SM Bus Enable (E6h) ................................................................................................................. 84
Revision History
Date
Revision
Description
June 2004
005
Removed 2 Gbyte memory support due to lack of
manufacturers of single-stick 2-Gbyte SDRAM (DDR
unregistered, unbuffered, ECC/non-ECC).
June 2003
004
Updated warranty and customer support information.
November 2002
003
Changed MTBF
November 2002
002
Changed default switch configuration to show SW 4 Open by
default.
November 2002
001
Initial release of this document
electronic components distributor