Intel IXP2400, Руководство пользователя

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58 Development Tools User’s Manual
IXP2400/IXP2800 Network Processors
Developer Workbench
Press Alt + F7.
2.9 Configuring the IXP2400 Simulation Environment
To configure the simulation environment for an IXP2400 project, select System Configuration
from the Simulation menu. You can set or change configuration values in the following property
pages depending on the Chip Family you have selected:
•
Clock frequencies - see Section 2.9.1
•
Memory - see Section 2.9.2
•
MSF Devices - see Section 2.9.3
•
Network Connections - see Section 2.9.4
•
CBUS Connections - see Section 2.9.5
The contents of each dialog depends on the processor type defined for the project. This
configuration data is passed to the Transactor and device models through the command line
interface when you start debugging.
2.9.1 IXP2400 Clock Frequencies
Depending on the processor type defined for the project the Clock Frequencies property page will
(see Figure 6 ) display different default values. The values that you specify on this property page are
passed to the Transactor using the
set_clocks()
console function.
•
Clock frequencies are set independently for each chip in the project.
•
In the PLL output frequency combo box, you may currently select the PLL output frequency
of 1200 MHz.
•
The Derived frequencies group box is for information only and displays the frequencies for
the Microengines and Intel XScale
®
core. These frequencies are derived from the PLL output
frequency using fixed divisors and they cannot be modified.
•
The Programmable frequencies group box contains selectable values for the two SRAM
channels and DRAM. These frequencies are programmable as a fixed set of ratios of the PLL
output frequency . These ratios correspond to fields in the Clock Control CSR , which is
displayed for reference only.
•
In the External frequencies group box, the MSF unit is externally clocked. Select either
Single or Dual mode clocking for receive and transmit interfaces. If you select Single mode,
only one clock value can be specified; the other control is disabled. Ratios correspond to fields
in the
MSF Clock Control CSR , which is displayed for reference only.
•
The PCI unit is always externally clocked. Select either 33 or 66 MHz from the scroll values.
The values shown in the following figure are the default values. The complete description of clock
frequencies, ratios, can be found in the
Intel

IXP2400 Network Processor Hardware Reference
Manual . The Clock and MSF CSRs can be found in the Intel

IXP2400/IXP2800 Network
Processor Programmer’s Reference Manual.