Intel IXDP465, Быстрый старт

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Quick Start Guide—Intel
®
IXDP465 Development Platform
AN Intel
®
IXDP465 Development Platform May 2005
Order Number: 305825, Revision: 002 9
Emulation is accomplished by accessing the EXP_UNIT_FUSE_RESET register via software and
writing a 1 to the fuse bit number that corresponds to the feature to be disabled. For a full
description of this register, see the
Intel
®
IXP45X and Intel
®
IXP46X Product Line of Network
Processors Developer’s Manual .
Table 2 shows the default fuse bit settings for the fully-featured IXP465 network processor. Other
rows in the table show the fuse bit settings which can disable a feature to emulate IXP460 or
IXP455 network processor operation.
6.0 Default Switch Settings
This section describes the factory default settings of all platform switches, to ensure they were not
accidentally changed during transport, or repositioned by a previous user of the platform.
The IXDP465 development platform has all switches located on the top-side of the entire assembly.
Figure 2 on page 11 identifies the exact location of all switches, clustered into two different areas,
one for GPIO LED Switches and one for Expansion Bus Address Strap Switches.
•
The GPIO LED Switches (SW1, SW2) allow the choice of connecting any of the 16 GPIO
signals to a LED, which can be useful for development purposes. Each GPIO has a green LED
indicator attached to it, which when illuminated, indicates a “low” state. A switch is placed on
each LED to allow the LED to be disconnected from the GPIO and reduce loading.
See
Figure 2 on page 11 for the DIP Switch locations. Although the factory default setting for
these switches is “LED Illuminated,” these 16 switches can be set to other settings if desired.
•
The Expansion Bus Address Strap switches (SW3, SW4, SW5) allows the choice of either
floating, or a 1 K pull-down resistor on each of the 24 expansion bus address lines. If set to
floating, then a weak internal pull-up resistor in the IXP465 network processor controls the
strap value. For operation as defined in this guide, ensure that all switches are set as shown in
Figure 2 .
All platform switches are summarized in Table 3 , which provides a high-level description of each
switch and their factory default settings, all of which must be checked prior to powering up the
platform for the first time.
Table 2. Fuse Bit Settings for Network Processor Emulation
Features of Intel
®
IXP45X and Intel
®
IXP46X Product Line of Network Processors
Processor
ECC/1
588
PCI NPE-C (crypto) NPE-B
(no
crypt
o
)
NPE-A
(W
AN)
Et
he
rn
e
t C
(
c
ry
pt
o)
Eth
e
rnet
B (n
o cryp
to)
UT
OPIA
HSS/HDLC Hash
/AES/DES
UDC
(USB
Device)
RCOMP_d
isable
Co
re speed
Co
re speed
RSA Ethernet B [1-3] Ethernet A USB H
o
st
UCP (ph
y_limit[1])
UCP (ph
y_limit[0])
Intel
®
IXP465 (533 MHz) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Intel
®
IXP460 (533 MHz) 0 0 0 0 1 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0
Intel
®
IXP455 (533 MHz) 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
Fuse Bit Number
†
23 22 21 20 19 18 17 16 13 10 9 8 7 6 5 4 3 2 1 0
† Available to software via EXP_UNIT_FUSE_RESET register.