Error Messages and Beep Codes
69
Table 30. Typical Port 80h POST Sequence
POST Code Description
21
Initializing a chipset component
22
Reading SPD from memory DIMMs
23
Detecting presence of memory DIMMs
25
Configuring memory
28
Testing memory
34
Loading recovery capsule
E4
Entered DXE phase
12
Starting application processor initialization
13
SMM initialization
50
Enumerating PCI buses
51
Allocating resourced to PCI bus
92
Detecting the presence of the keyboard
90
Resetting keyboard
94
Clearing keyboard input buffer
95
Keyboard Self Test
EB
Calling Video BIOS
58
Resetting USB bus
5A
Resetting PATA/SATA bus and all devices
92
Detecting the presence of the keyboard
90
Resetting keyboard
94
Clearing keyboard input buffer
5A
Resetting PATA/SATA bus and all devices
28
Testing memory
90
Resetting keyboard
94
Clearing keyboard input buffer
E7
Waiting for user input
01
INT 19
00
Ready to boot
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