Summary Tables of Changes
12
Specification Update
Number
Stepping
Status Description
B0
BH21
X
No Fix Writes to IA32_DEBUGCTL MSR May Fail when FREEZE_LBRS_ON_PMI is Set
BH22
X
No Fix Address Reported by Machine-Check Architecture (MCA) on L2 Cache Errors
May be Incorrect
BH23
X
No Fix Performance Monitoring Event for Outstanding Bus Requests Ignores
AnyThread Bit
BH24
X
No Fix Corruption of CS Segment Register
During RSM While Transitioning From Real
Mode to Protected Mode
BH25
X
No Fix GP and Fixed Performance Monitoring Counters With AnyThread Bit Set May
Not Accurately Count Only OS or Only USR Events
BH26
X
No Fix PMI Request is Not Generated on a Counter Overflow if Its OVF Bit is Already
Set in IA32_PERF_GLOBAL_STATUS
BH27
X
No Fix Processor May Use an Incorrect Translation if the TLBs Contain Two Different
Translations For a Linear Address
BH28
X
No Fix PEBS Record not Updated when in Probe Mode
BH29
X
No Fix LBR/BTM/BTS Information Immediately After a Transition From
Legacy/Compatibility Mode to 64-bit Mode May be Incorrect
BH30
X
No Fix During a C-State Exit due to a Pending External Interrupt the System May Hang
BH31
X
No Fix Pending x87 FPU Exceptions (#MF) Following STI May Be Serviced Before
Higher Priority Interrupts
BH32
X
No Fix Benign Exception after a Double Fault May Not Cause a Triple Fault Shutdown
BH33
X
No Fix IA32_MC1_STATUS MSR Bit[60] Does Not Reflect Machine Check Error
Reporting Enable Correctly
BH34
X
No Fix LINT0 Assertion and Deassertion During an Inactive State May Cause
Unexpected Operation When APIC is Disabled
BH35
X
No Fix IRET under Certain Conditions May Cause an Unexpected Alignment Check
Exception
BH36
X
No Fix HSYNC and VSYNC Buffers Do Not Meet VESA Rise and Undershoot
Specification
BH37
X
No Fix Glitch on LVDS Display Interface Clocks and Data Lines May be Observed
During Power Up Sequence
BH38
X
No Fix Synchronous Reset of IA32_MPERF on IA32_APERF Overflow May Not Work
BH39
X
No Fix Writes to Set IA32_MCG_STATUS.MCIP Will Fail
BH40
X
No Fix IA32_MC2_STATUS [OVERFLOW] Bit is Not Set When Single-Bit Correctable
ECC Error Occurs
BH41
X
No Fix FP Data Operand Pointer May Be Incorrectly Calculated After an FP Access
Which Wraps a 64-Kbyte Boundary in 16-Bit Code
BH42
X
No Fix High Temperature Circuit Marginality Issue May Cause the System to Hang or
Auto Reboot
