Intel 82555, Техническое описание

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82555 — Networking Silicon
48 Datasheet
11.4.4 Transmit Packet Timing Parameters
11.4.5 Squelch Test Timing Parameters
Symbol Parameter Conditions Min Typ Max Units
T15 T
XEN_ST
TXC on first TXEN active to start
of frame
100 Mbps 10 12 bits
T15a
T
XEN_ST
TXC on first TXEN active to start
of frame
10 Mbps 3.5 5 bits
T16 T
XEN_CRSH
TXC on first TXEN active to
rising edge of CRS
100 Mbps 4 bits
T16a
T
XEN_CRSH
TXC on first TXEN active to
rising edge of CRS
10 Mbps 1.5 bits
T17 T
XEN_END
TXC on first TXEN inactive to
end of frame
100 Mbps 17 bits
T17a
T
XEN_END
TXC on first TXEN inactive to
end of frame
10 Mbps 5 bits
T18 T
XEN_CRSL
TXC on first TXEN inactive to
falling edge of CRS
100 Mbps 11 bits
T18a
T
XEN_CRSL
TXC on first TXEN inactive to
falling edge of CRS
10 Mbps 6 bits
T19 T
EOF
End of frame high time 10 Mbps 250 350 ns
Figure 19. Transmit Frame Timing Parameters
TXEN
CRS
Valid Frame Data
TXCLK
Frame On link
T15,T15a
T16,T16a
T17,T17a
T18,T18a
Symbol Parameter Conditions Min Typ Max Units
T20 T
SQE_DEL
Collision detect heartbeat delay 10 Mbps 7 8 bits
T21 T
SQE_DUR
Collision detect heartbeat
duration
10 Mbps 9 11 bits