Application Note
page 14 of 33
V1.7
2022-08-01
XENSIV™ BGT60LTR11AIP shield
60 GHz radar system platform
Hardware description
3.9
MMIC quad state inputs
The BGT60LTR11AIP MMIC has four quad-state inputs QS1-4, used in autonomous mode to set the device
configuration. Figure 15 shows the default settings of these QS pins on the BGT60LTR11AIP shield.
To offer more flexibility, to the autonomous mode, an
“Advance mode”
is enabled when the BGT_PLL_TRIG pin
is kept
“1”
during chip boot and QS1 is either GND or OPEN, where BGT_MOSI and BGT_SCK pins are also
sampled to determine the PRT. In addition, pins QS2 and QS3 are evaluated by the ADC and converted in 4-bit
values each before each “mean window”
.
QS1
BGT_MOSI
QS4
BGT_SCK
QS3
QS2
BGT_PLL_TRIG
Figure 15
MMIC QS1 to QS4 quad state inputs
For more details on the BGT60LTR11AIP MMIC quad state inputs, please refer to the AN625
–
User's guide to
BGT60LTR11AIP.
