Infineon TLE984 Series, Руководство пользователя для прошивки

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Firmware User Manual (AE-step) 7 Revision 1.02
2019-04-24
TLE984x Firmware User Manual
Overview
2 Overview
This specification includes the description of all firmware features including the operations and tasks defined
to support the general startup behaviour and various boot options.
2.1 Firmware Architecture
The BootROM in the TLE984x consists of a firmware image located inside the device’s ROM. It consists of the
startup procedure, the bootstrap loader via LIN, the bootstrap loader via Fast- LIN, NVM user routines and NVM
integrity handling routines.
The BootROM in TLE984x is located at the address 00000000
H
, and so represents the standard reset handler
routine. The BootROM firmware is executed in the ARM Cortex CPU core and uses the SRAM for variables and
software stack.
Figure 2-1 shows the TLE984x components used during execution of the BootROM.
Figure 2-1 Block Diagram of the BootROM and its Interaction with other TLE984x Components
The startup procedure is the first software-controlled operation in the BootROM that is automatically
executed after every reset. Certain startup submodules are skipped depending on the type of reset (more
details are provided in
“Reset Types” on Page 14 ) and the error which might occur (more details are provided
in “Startup Error Handling” on Page 17 ).
The startup procedure includes the NVM initialisation, PLL configuration, enabling of NVM protection,
branching to the different modes and other startup procedure steps.
There are two (2) operation modes in the BootROM :
• User/BSL mode
• Debug Support mode
The deciding factor will be on the latch values of TMS and P0.0 upon a reset. During reset, these signals are
latched at the rising edge of RESET pin. Details are provided in
“Boot Modes” on Page 10 .
ARM CORTEX-M0
BootROM
(ROM)
SRAM NVM FLASH
Serial Communication
Interfaces
(Fast-LIN (with UART
protocol) / LIN)
Timer GPT12
Watchdog WDT1
Systembus
Chip Environment
(PMU/SCU/PLL)