Infineon PSoC 6, Начало работы

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3 Device features
The PSoC
™
6 MCU device has an extensive feature set as shown in Figure 4 . The following is a list of its major
features. For more information, see the device datasheet , the Technical Reference Manual (TRM) , and the
section on Related application notes and code examples .
• MCU subsystem
-
150-MHz Arm
®
Cortex
®
-M4 and 100-MHz Arm
®
Cortex
®
-M0+
- Up to 2 MB of flash with additional 32 KB for EEPROM emulation and 32KB supervisory flash
- Up to 1 MB of SRAM with selectable Deep Sleep retention granularity at 32-KB retention boundaries
- Inter-processor communication supported in hardware
- DMA controllers
• Security Features
-
Cryptography accelerators and true random number generator function
- One-time programmable eFUSE for secure key storage
- Secure boot with hardware hash-based authentication
• I/O subsystem
-
Up to 104 GPIOs with programmable drive modes, drive strength, slew rates
- Two ports with Smart I/O that can implement Boolean operations
• Programmable analog blocks
-
Two opamps of 6-MHz gain bandwidth (GBW) and two low-power comparators
- Up to One 12-bit, 1-Msps SAR ADC and one 12-bit voltage-mode DAC
• Programmable digital blocks, communication interfaces
-
Up to 12 UDBs for custom digital peripherals
- Up to 32 TCPWM blocks configurable as 16-bit/32-bit timer, counter, PWM, or quadrature decoder
- Up to 13 SCBs configurable as I2C Master or Slave, SPI Master or Slave, or UART
- Controller Area Network interface with Flexible Data-Rate
- Up to two Secure Digital Host Controllers with support for SD, SDIO, and eMMC interfaces
- Audio subsystem with up to two I2S interface and two PDM channels
- SMIF interface with support for execute-in-place from external quad SPI flash memory and on-the-fly
encryption and decryption
- Full-Speed, dual-role USB with device and host capability
• CAPSENSE
™
with SmartSense auto-tuning
- Supports both CAPSENSE
™
Sigma-Delta (CSD) and CAPSENSE
™
Transmit/Receive (CSX) controllers
- Provides best-in-class SNR, liquid tolerance, and proximity sensing
• Operating voltage range, power domains, and low-power modes
-
Device operating voltage: 1.71 V to 3.6 V with user-selectable core logic operation at either 1.1 V or 0.9 V
- Multiple on-chip regulators: low-drop out (LDO for Active, Deep Sleep modes), buck converter
- Six power modes for fine-grained power management
- An “Always ON” backup power domain with built-in RTC, power management integrated circuit (PMIC)
control, and limited SRAM backup
Getting started with PSoC
™
6 MCU on PSoC
™
Creator
3 Device features
Application Note 11 002-21774 Rev. *G
2022-07-21