Additional Information
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Revision 6.0
2020-11-12
Recommendations for Board Assembly of Infineon Quad Flat
Packages
Printed Circuit Board
Further details and specific footprint recommendations can be found in Infineon package data that is available
on the Infineon web page [1]. Please choose a specific package when searching the data base, which will then
show you an example of the stencil aperture layout for each package.
2.3
Via-in-Pad Design
Thermal and electrical connections to the inner and/or bottom copper planes of the PCB are usually created by
plated through-hole vias in the board. The heat is then transferred from the chip over the package die pad and
the solder joint to the thermal pad on the board and further through the PCB by the thermal vias.
The diameter and the number of vias in the thermal pad depend on the specific thermal requirements of the
final product, the power consumption of the product, the application, and the construction of the PCB. A
typical hole diameter for thermal vias is 0.2 - 0.5 mm. An array with 1.0 - 1.2 mm pitch can be a reasonable
starting point for further design optimization. The implementation of thermal vias has several impacts on the
board assembly as outlined below. A constant increase of number of vias does not necessarily translate into a
constant decrease of the thermal resistance of the entire assembly set-up. Thermal and electrical analysis
and/or testing together with a proper board assembly design procedure are recommended to determine the
optimum number of vias needed.
One of the primary exposed pad design objectives, besides the thermal management, should be to avoid the
penetration of the vias by solder. Consequences of solder penetration can be a decreased stand-off between
the PCB and the package, an increased void formation ultimately resulting in an insufficient solder joint area, or
surplus solder on the opposite side of the PCB.
A first approach for risk reduction should be the prevention of a direct print of solder paste on the via orifice.
Since the stencil for large area prints such as on die pads is usually segmented, it is a good practice to position
the vias under the beam intersections of the aperture as shown in
. With such an approach, a good
solder joint on a central die pad can be formed using vias that remain open on both sides of the board.
Despite the precautionary stencil design approach, the solder can move into the via, driven by the wetting
forces. If the solder then protrudes to the opposite side of the PCB, it may interfere with a second solder paste
print process. To minimize the effect, dummy areas on the opposite side as shown in
surplus solder to avoid beading and solder lumping.
Figure 7
Wettable “dummy” area on the opposite side of the board surrounds the vias to act as a
buffer for surplus solder.
In case the solder variance in volume below the die pad is too high due to the wetting of vias, they can be
closed by “tenting.” This process includes covering the vias by a solder mask (e.g. dry-film solder mask). If the
via tenting is done only on the opposite side of the board, the voiding rate will increase significantly. Another
method to close vias is called “plugging” (filling with epoxy), followed by overplating. Very small vias (100 µm in
